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gbowne1-ad
| Author | SHA1 | Date | |
|---|---|---|---|
| 95372a66e6 | |||
| e376526426 |
9
Makefile
9
Makefile
@@ -8,13 +8,8 @@ OBJCOPY = i386-elf-objcopy
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||||
BUILD_DIR = build
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CROSS_DIR = cross
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DISK_IMG = $(BUILD_DIR)/disk.img
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STAGE2_ADDR = 0x7e00
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STAGE2_SIZE = 2048
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# Place the memory map (e820) past stage2 bl in memory
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MEMMAP_BASE = $(shell echo $$(($(STAGE2_ADDR) + $(STAGE2_SIZE))))
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KERNEL_C_SRC = $(wildcard kernel/*.c)
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KERNEL_ASM_SRC = $(wildcard kernel/*.asm)
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KERNEL_OBJ = $(patsubst kernel/%.c, $(BUILD_DIR)/%.o, $(KERNEL_C_SRC))
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@@ -34,7 +29,7 @@ stage1: $(BUILD_DIR)
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# NOTE: Stage2 final size should be checked against `$(STAGE2_SIZE)` by the build system to avoid an overflow.
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# Alternatively, convey the final stage2 size through other means to stage1.
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stage2: $(BUILD_DIR)
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$(AS) $(ASFLAGS) -DMEMMAP_BASE=$(MEMMAP_BASE) -o $(BUILD_DIR)/stage2.o bootloader/stage2.asm
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$(AS) $(ASFLAGS) -o $(BUILD_DIR)/stage2.o bootloader/stage2.asm
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$(CC) -std=c11 -ffreestanding -nostdlib -nostdinc -fno-stack-protector -m32 -Iklibc/include -g -c -o $(BUILD_DIR)/stage2_load.o bootloader/stage2_load.c
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$(LD) -Tbootloader/stage2.ld -melf_i386 -o $(BUILD_DIR)/$@.elf $(BUILD_DIR)/stage2.o $(BUILD_DIR)/stage2_load.o
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$(OBJCOPY) -O binary $(BUILD_DIR)/$@.elf $(BUILD_DIR)/$@.bin
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@@ -44,7 +39,7 @@ $(BUILD_DIR)/asm_%.o: kernel/%.asm
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$(AS) $(ASFLAGS) -o $@ $<
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$(BUILD_DIR)/%.o: kernel/%.c
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$(CC) -DMEMMAP_BASE=$(MEMMAP_BASE) -std=c11 -ffreestanding -nostdlib -nostdinc -fno-stack-protector -m32 -Iklibc/include -g -c -o $@ $<
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$(CC) -std=c11 -ffreestanding -nostdlib -nostdinc -fno-stack-protector -m32 -Iklibc/include -g -c -o $@ $<
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$(BUILD_DIR)/klibc/%.o: klibc/src/%.c
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$(CC) -std=c11 -ffreestanding -nostdlib -nostdinc -fno-stack-protector -m32 -Iklibc/include -g -c -o $@ $<
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@@ -11,16 +11,16 @@ Bootloader documentation for ClassicOS
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## Stage 1 (`stage1.asm`)
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Responsible for loading the second stage using BIOS routines, and switching to protected mode.
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- Queries CHS parameters from BIOS
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- Loads the second stage bootloader (2048 B) to `0x7c00`
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- Sets up a GDT with descriptor entries for code and data both covering the whole 32-bit address space
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- Enables A20
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- Jumps to stage2
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- Set CR0.PE (enable protected mode) and jump to stage 2
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## Stage 2 (`stage2.asm, stage2_load.c`)
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- Read and store E820 memory map from BIOS
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- Sets up a GDT with descriptor entries for code and data both covering the whole 32-bit address space
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- Set CR0.PE (enable protected mode)
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- Set up segment registers
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- Load the kernel ELF header
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- Parse the program headers, and load all `PT_LOAD` segments from disk
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@@ -40,8 +40,11 @@ _start:
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call enable_a20
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jc a20_error ; Jump if A20 enable fails
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; Jump to s2
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jmp 0x7e00
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; Setup Global Descriptor Table
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call setup_gdt
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; Switch to protected mode and jump to second stage at 0x08:0x7E00
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call switch_to_pm
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disk_error:
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mov si, disk_error_msg
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@@ -238,6 +241,30 @@ check_a20:
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clc ; Clear carry flag to indicate success
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ret
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; ----------------------------------------------------------------
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gdt_start:
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dq 0x0000000000000000 ; Null descriptor
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dq 0x00CF9A000000FFFF ; 32-bit code segment (selector 0x08)
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dq 0x00CF92000000FFFF ; 32-bit data segment (selector 0x10)
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dq 0x00009A000000FFFF ; 16-bit code segment for real mode (selector 0x18)
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gdt_descriptor:
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dw gdt_end - gdt_start - 1
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dd gdt_start
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gdt_end:
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setup_gdt:
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lgdt [gdt_descriptor]
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ret
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; ----------------------------------------------------------------
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switch_to_pm:
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cli
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mov eax, cr0
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or eax, 1
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mov cr0, eax
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jmp 0x08:0x7E00 ; jump to S2
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; ----------------------------------------------------------------
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print_string_16:
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.loop:
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@@ -1,80 +1,10 @@
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[BITS 32]
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global _start
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global ata_lba_read
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extern load_kernel
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%define e820_magic 0x534d4150 ; "SMAP"
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%define e820_entry_size 24
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%define e820_max_entries 128
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; ----------------------------------------------------------------
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; Real mode
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; ----------------------------------------------------------------
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[BITS 16]
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_start:
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call read_e820
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call setup_gdt
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call switch_to_pm
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read_e820:
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xor ebx, ebx
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mov es, bx
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mov di, MEMMAP_BASE+4 ; ES=0 DI=MEMMAP_BASE+4
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xor bp, bp ; Keeping count in bp
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.e820_loop:
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mov eax, 0xe820
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mov ecx, e820_entry_size
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mov edx, e820_magic
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int 0x15
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jc .done ; Error?
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cmp eax, e820_magic ; Verify "SMAP"
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jne .done
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test ecx, ecx ; Skip 0-sized entries
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jz .skip
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add di, e820_entry_size ; Advance write addr
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inc bp ; Increment count
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cmp bp, e820_max_entries ; Stop if we're at capacity
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jae .done
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.skip:
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test ebx, ebx
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jne .e820_loop
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.done:
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mov [MEMMAP_BASE], bp ; Store count
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ret
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setup_gdt:
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lgdt [gdt_descriptor]
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ret
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switch_to_pm:
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cli
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mov eax, cr0
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or eax, 1
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mov cr0, eax
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jmp 0x08:pm_entry
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e820_count:
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dw 0
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gdt_start:
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dq 0x0000000000000000 ; Null descriptor
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dq 0x00CF9A000000FFFF ; 32-bit code segment (selector 0x08)
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dq 0x00CF92000000FFFF ; 32-bit data segment (selector 0x10)
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dq 0x00009A000000FFFF ; 16-bit code segment for real mode (selector 0x18)
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gdt_descriptor:
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dw gdt_end - gdt_start - 1
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dd gdt_start
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gdt_end:
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; ----------------------------------------------------------------
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; Protected mode
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; ----------------------------------------------------------------
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[BITS 32]
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pm_entry:
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; Set up segments
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; Data segments
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mov ax, 0x10
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@@ -88,8 +18,9 @@ pm_entry:
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mov ax, 0x08
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mov cs, ax
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; Stack
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; Stack (must be identity-mapped)
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mov esp, 0x90000
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call load_kernel
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jmp eax
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107
kernel/fat16.c
107
kernel/fat16.c
@@ -1,107 +0,0 @@
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#include "fat16.h"
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#include "ata.h" // Use ata_read_sector and ata_write_sector
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#include "print.h" // For debugging
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#include <string.h> // For string manipulation
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// Global variables
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static fat16_boot_sector_t boot_sector;
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static uint32_t root_dir_sector = FAT16_ROOT_DIR_SECTOR;
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// Read a sector from the disk using ATA
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bool read_sector(uint32_t lba, uint8_t* buffer) {
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return ata_read_sector(lba, buffer);
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}
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// Write a sector to the disk using ATA
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bool write_sector(uint32_t lba, const uint8_t* buffer) {
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return ata_write_sector(lba, buffer);
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}
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// Parse the boot sector to retrieve basic file system info
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bool parse_fat16_boot_sector(void) {
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uint8_t sector_buffer[FAT16_SECTOR_SIZE];
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// Read the boot sector
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if (!read_sector(FAT16_BOOT_SECTOR, sector_buffer)) {
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print_string("[FAT16] Failed to read boot sector\n");
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return false;
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}
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// Cast to boot sector structure
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memcpy(&boot_sector, sector_buffer, sizeof(fat16_boot_sector_t));
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// Check for FAT16 signature
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if (boot_sector.oem_name[0] != 'F' || boot_sector.oem_name[1] != 'A' || boot_sector.oem_name[2] != 'T') {
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print_string("[FAT16] Invalid FAT16 boot sector signature\n");
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return false;
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}
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print_string("[FAT16] FAT16 boot sector parsed successfully\n");
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return true;
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}
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// Parse the root directory
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bool parse_fat16_root_dir(void) {
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uint8_t sector_buffer[FAT16_SECTOR_SIZE];
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for (int i = 0; i < (boot_sector.max_root_entries / (FAT16_SECTOR_SIZE / sizeof(fat16_dir_entry_t))); i++) {
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// Read root directory sector
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if (!read_sector(root_dir_sector + i, sector_buffer)) {
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print_string("[FAT16] Failed to read root directory sector\n");
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return false;
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}
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// Parse the root directory entries
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for (int j = 0; j < (FAT16_SECTOR_SIZE / sizeof(fat16_dir_entry_t)); j++) {
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fat16_dir_entry_t* entry = (fat16_dir_entry_t*)§or_buffer[j * sizeof(fat16_dir_entry_t)];
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if (entry->name[0] == 0x00) {
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// End of directory entries
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return true;
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}
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if (entry->name[0] != 0xE5) {
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// Print file name (8.3 format)
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char filename[12];
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strncpy(filename, (char*)entry->name, 8);
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filename[8] = '.';
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strncpy(&filename[9], (char*)entry->ext, 3);
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filename[11] = '\0';
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print_string(filename);
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print_string("\n");
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}
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}
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}
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return true;
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}
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// Read a specific directory entry from the FAT16 root directory
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bool read_fat16_entry(uint16_t entry_index, fat16_dir_entry_t* entry) {
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uint8_t sector_buffer[FAT16_SECTOR_SIZE];
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uint32_t sector_num = FAT16_ROOT_DIR_SECTOR + (entry_index / (FAT16_SECTOR_SIZE / sizeof(fat16_dir_entry_t)));
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uint16_t entry_offset = entry_index % (FAT16_SECTOR_SIZE / sizeof(fat16_dir_entry_t));
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// Read the sector
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if (!read_sector(sector_num, sector_buffer)) {
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print_string("[FAT16] Failed to read root directory sector\n");
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return false;
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}
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// Get the entry
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memcpy(entry, §or_buffer[entry_offset * sizeof(fat16_dir_entry_t)], sizeof(fat16_dir_entry_t));
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return true;
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}
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// Mount the FAT16 filesystem
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bool mount_fat16(void) {
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// Parse the boot sector
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if (!parse_fat16_boot_sector()) {
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return false;
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}
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// Parse the root directory
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if (!parse_fat16_root_dir()) {
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return false;
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}
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print_string("[FAT16] Filesystem mounted successfully\n");
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return true;
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}
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@@ -1,60 +0,0 @@
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#ifndef FAT16_H
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#define FAT16_H
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#include <stdint.h>
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#include <stdbool.h>
|
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/* FAT16 Constants */
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#define FAT16_SECTOR_SIZE 512
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#define FAT16_CLUSTER_SIZE 1
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#define FAT16_MAX_FILENAME_LEN 11 // 8.3 format
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#define FAT16_ROOT_DIR_ENTRIES 224 // Fat16 root directory entries (typically 512 bytes per entry)
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#define FAT16_BOOT_SECTOR 0
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#define FAT16_FAT1_SECTOR 1
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#define FAT16_FAT2_SECTOR 2
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#define FAT16_ROOT_DIR_SECTOR 19 // First sector of root directory
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/* Boot Sector */
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typedef struct {
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uint8_t jmp[3]; // Jump instruction to code
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||||
uint8_t oem_name[8]; // OEM Name
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uint16_t bytes_per_sector; // Bytes per sector (512)
|
||||
uint8_t sectors_per_cluster; // Sectors per cluster
|
||||
uint16_t reserved_sectors; // Reserved sectors
|
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uint8_t num_fats; // Number of FAT tables
|
||||
uint16_t max_root_entries; // Max number of root directory entries
|
||||
uint16_t total_sectors_16; // Total sectors in FAT16
|
||||
uint8_t media_type; // Media type (0xF8 = fixed drive)
|
||||
uint16_t sectors_per_fat; // Sectors per FAT table
|
||||
uint16_t sectors_per_track; // Sectors per track (for CHS addressing)
|
||||
uint16_t num_heads; // Number of heads (for CHS addressing)
|
||||
uint32_t hidden_sectors; // Hidden sectors (before the partition)
|
||||
uint32_t total_sectors_32; // Total sectors in FAT16 (extended)
|
||||
} __attribute__((packed)) fat16_boot_sector_t;
|
||||
|
||||
/* FAT16 Directory Entry */
|
||||
typedef struct {
|
||||
uint8_t name[8]; // File name (8 chars)
|
||||
uint8_t ext[3]; // File extension (3 chars)
|
||||
uint8_t attributes; // File attributes (e.g., directory, read-only)
|
||||
uint8_t reserved; // Reserved
|
||||
uint8_t creation_time[2]; // Creation time
|
||||
uint8_t creation_date[2]; // Creation date
|
||||
uint8_t last_access_date[2]; // Last access date
|
||||
uint8_t first_cluster_high[2]; // High part of first cluster number
|
||||
uint8_t last_mod_time[2]; // Last modification time
|
||||
uint8_t last_mod_date[2]; // Last modification date
|
||||
uint8_t first_cluster_low[2]; // Low part of first cluster number
|
||||
uint32_t file_size; // File size in bytes
|
||||
} __attribute__((packed)) fat16_dir_entry_t;
|
||||
|
||||
/* Function Prototypes */
|
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bool mount_fat16(void);
|
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bool read_sector(uint32_t lba, uint8_t* buffer);
|
||||
bool write_sector(uint32_t lba, const uint8_t* buffer);
|
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bool parse_fat16_boot_sector(void);
|
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bool parse_fat16_root_dir(void);
|
||||
bool read_fat16_entry(uint16_t entry_index, fat16_dir_entry_t* entry);
|
||||
|
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#endif // FAT16_H
|
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@@ -1,18 +1,21 @@
|
||||
#include "memmap.h"
|
||||
|
||||
#define BOOTLOADER_MEMMAP_COUNT_ADDR MEMMAP_BASE
|
||||
#define BOOTLOADER_MEMMAP_ADDR (MEMMAP_BASE + 4)
|
||||
|
||||
uint32_t get_memory_map(memory_map_entry_t *map, uint32_t max_entries) {
|
||||
// Read the number of entries found by the bootloader
|
||||
uint32_t entries_found = *(uint32_t*)BOOTLOADER_MEMMAP_COUNT_ADDR;
|
||||
memory_map_entry_t *bios_data = (memory_map_entry_t*)BOOTLOADER_MEMMAP_ADDR;
|
||||
|
||||
uint32_t count = 0;
|
||||
while (count < entries_found && count < max_entries) {
|
||||
map[count] = bios_data[count];
|
||||
|
||||
if (max_entries >= 1) {
|
||||
map[count].base_addr = 0x00000000;
|
||||
map[count].length = 0x0009FC00;
|
||||
map[count].type = 1;
|
||||
count++;
|
||||
}
|
||||
|
||||
if (max_entries >= 2) {
|
||||
map[count].base_addr = 0x00100000;
|
||||
map[count].length = 0x1FF00000;
|
||||
map[count].type = 1;
|
||||
count++;
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
}
|
||||
@@ -7,7 +7,6 @@ typedef struct {
|
||||
uint64_t base_addr;
|
||||
uint64_t length;
|
||||
uint32_t type;
|
||||
uint32_t ext;
|
||||
} __attribute__((packed)) memory_map_entry_t;
|
||||
|
||||
uint32_t get_memory_map(memory_map_entry_t *map, uint32_t max_entries);
|
||||
|
||||
109
kernel/pci.c
109
kernel/pci.c
@@ -1,109 +0,0 @@
|
||||
#include "pci.h"
|
||||
#include "io.h"
|
||||
|
||||
/* --- Configuration Access Functions --- */
|
||||
|
||||
uint32_t pci_config_read_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
|
||||
uint32_t address = (uint32_t)((uint32_t)1 << 31) |
|
||||
((uint32_t)bus << 16) |
|
||||
((uint32_t)slot << 11) |
|
||||
((uint32_t)func << 8) |
|
||||
(offset & 0xFC);
|
||||
outl(PCI_CONFIG_ADDRESS, address);
|
||||
return inl(PCI_CONFIG_DATA);
|
||||
}
|
||||
|
||||
void pci_config_write_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t data) {
|
||||
uint32_t address = (uint32_t)((uint32_t)1 << 31) |
|
||||
((uint32_t)bus << 16) |
|
||||
((uint32_t)slot << 11) |
|
||||
((uint32_t)func << 8) |
|
||||
(offset & 0xFC);
|
||||
outl(PCI_CONFIG_ADDRESS, address);
|
||||
outl(PCI_CONFIG_DATA, data);
|
||||
}
|
||||
|
||||
/* To read a word or byte, we read the Dword and shift/mask */
|
||||
uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
|
||||
uint32_t dword = pci_config_read_dword(bus, slot, func, offset);
|
||||
return (uint16_t)((dword >> ((offset & 2) * 8)) & 0xFFFF);
|
||||
}
|
||||
|
||||
uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
|
||||
uint32_t dword = pci_config_read_dword(bus, slot, func, offset);
|
||||
return (uint8_t)((dword >> ((offset & 3) * 8)) & 0xFF);
|
||||
}
|
||||
|
||||
/* --- BAR Decoding Logic --- */
|
||||
|
||||
pci_bar_t pci_get_bar(uint8_t bus, uint8_t slot, uint8_t func, uint8_t bar_index) {
|
||||
pci_bar_t bar = {0};
|
||||
uint8_t offset = PCI_REG_BAR0 + (bar_index * 4);
|
||||
|
||||
uint32_t initial_val = pci_config_read_dword(bus, slot, func, offset);
|
||||
|
||||
// The Size Masking Trick
|
||||
pci_config_write_dword(bus, slot, func, offset, 0xFFFFFFFF);
|
||||
uint32_t mask = pci_config_read_dword(bus, slot, func, offset);
|
||||
pci_config_write_dword(bus, slot, func, offset, initial_val); // Restore
|
||||
|
||||
if (initial_val & 0x1) {
|
||||
// I/O Space BAR
|
||||
bar.is_io = true;
|
||||
bar.base_address = initial_val & 0xFFFFFFFC;
|
||||
bar.size = ~(mask & 0xFFFFFFFC) + 1;
|
||||
} else {
|
||||
// Memory Space BAR
|
||||
bar.is_io = false;
|
||||
bar.base_address = initial_val & 0xFFFFFFF0;
|
||||
bar.is_prefetchable = (initial_val & 0x8) != 0;
|
||||
bar.size = ~(mask & 0xFFFFFFF0) + 1;
|
||||
}
|
||||
|
||||
return bar;
|
||||
}
|
||||
|
||||
/* --- Enumeration and Discovery --- */
|
||||
|
||||
void pci_check_function(uint8_t bus, uint8_t slot, uint8_t func) {
|
||||
uint16_t vendor_id = pci_config_read_word(bus, slot, func, PCI_REG_VENDOR_ID);
|
||||
if (vendor_id == 0xFFFF) return;
|
||||
|
||||
uint16_t device_id = pci_config_read_word(bus, slot, func, PCI_REG_DEVICE_ID);
|
||||
uint8_t class_code = pci_config_read_byte(bus, slot, func, PCI_REG_CLASS);
|
||||
|
||||
/* Optional: Set Master Latency Timer if it is 0.
|
||||
A value of 32 (0x20) or 64 (0x40) is typical.
|
||||
*/
|
||||
uint8_t latency = pci_config_read_byte(bus, slot, func, PCI_REG_LATENCY_TIMER);
|
||||
if (latency == 0) {
|
||||
// pci_config_write_byte would be needed here, or write a dword with the byte modified
|
||||
uint32_t reg_0c = pci_config_read_dword(bus, slot, func, 0x0C);
|
||||
reg_0c |= (0x20 << 8); // Set latency to 32
|
||||
pci_config_write_dword(bus, slot, func, 0x0C, reg_0c);
|
||||
}
|
||||
|
||||
// Replace with your kernel's print/logging function
|
||||
// printf("Found PCI Device: %x:%x Class: %x at %d:%d:%d\n", vendor_id, device_id, class_code, bus, slot, func);
|
||||
}
|
||||
|
||||
void pci_init(void) {
|
||||
for (uint16_t bus = 0; bus < 256; bus++) {
|
||||
for (uint8_t slot = 0; slot < 32; slot++) {
|
||||
// Check Function 0 first
|
||||
uint16_t vendor = pci_config_read_word(bus, slot, 0, PCI_REG_VENDOR_ID);
|
||||
if (vendor == 0xFFFF) continue;
|
||||
|
||||
pci_check_function(bus, slot, 0);
|
||||
|
||||
// Check if this is a multi-function device
|
||||
uint8_t header_type = pci_config_read_byte(bus, slot, 0, PCI_REG_HEADER_TYPE);
|
||||
if (header_type & 0x80) {
|
||||
// Check functions 1-7
|
||||
for (uint8_t func = 1; func < 8; func++) {
|
||||
pci_check_function(bus, slot, func);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
60
kernel/pci.h
60
kernel/pci.h
@@ -1,60 +0,0 @@
|
||||
#ifndef PCI_H
|
||||
#define PCI_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
/* I/O Ports for PCI Configuration Mechanism #1 */
|
||||
#define PCI_CONFIG_ADDRESS 0xCF8
|
||||
#define PCI_CONFIG_DATA 0xCFC
|
||||
|
||||
/* Common PCI Configuration Register Offsets */
|
||||
#define PCI_REG_VENDOR_ID 0x00
|
||||
#define PCI_REG_DEVICE_ID 0x02
|
||||
#define PCI_REG_COMMAND 0x04
|
||||
#define PCI_REG_STATUS 0x06
|
||||
#define PCI_REG_REVISION_ID 0x08
|
||||
#define PCI_REG_PROG_IF 0x09
|
||||
#define PCI_REG_SUBCLASS 0x0A
|
||||
#define PCI_REG_CLASS 0x0B
|
||||
#define PCI_REG_CACHE_LINE_SIZE 0x0C
|
||||
#define PCI_REG_LATENCY_TIMER 0x0D
|
||||
#define PCI_REG_HEADER_TYPE 0x0E
|
||||
#define PCI_REG_BIST 0x0F
|
||||
#define PCI_REG_BAR0 0x10
|
||||
#define PCI_REG_BAR1 0x14
|
||||
#define PCI_REG_BAR2 0x18
|
||||
#define PCI_REG_BAR3 0x1C
|
||||
#define PCI_REG_BAR4 0x20
|
||||
#define PCI_REG_BAR5 0x24
|
||||
#define PCI_REG_INTERRUPT_LINE 0x3C
|
||||
|
||||
typedef struct {
|
||||
uint32_t base_address;
|
||||
uint32_t size;
|
||||
bool is_io;
|
||||
bool is_prefetchable; // Only for Memory BARs
|
||||
} pci_bar_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t bus;
|
||||
uint8_t device;
|
||||
uint8_t function;
|
||||
uint16_t vendor_id;
|
||||
uint16_t device_id;
|
||||
uint8_t class_code;
|
||||
uint8_t subclass;
|
||||
uint8_t interrupt_line;
|
||||
} pci_dev_t;
|
||||
|
||||
/* Function Prototypes */
|
||||
uint32_t pci_config_read_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
||||
void pci_config_write_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t data);
|
||||
|
||||
uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
||||
uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
||||
|
||||
pci_bar_t pci_get_bar(uint8_t bus, uint8_t slot, uint8_t func, uint8_t bar_index);
|
||||
void pci_init(void);
|
||||
|
||||
#endif
|
||||
25
kernel/pic.h
Normal file
25
kernel/pic.h
Normal file
@@ -0,0 +1,25 @@
|
||||
#ifndef PIC_H
|
||||
#define PIC_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* I/O Ports for the PICs */
|
||||
#define PIC1_COMMAND 0x20
|
||||
#define PIC1_DATA 0x21
|
||||
#define PIC2_COMMAND 0xA0
|
||||
#define PIC2_DATA 0xA1
|
||||
|
||||
/* PIC Commands */
|
||||
#define PIC_EOI 0x20 /* End of Interrupt */
|
||||
|
||||
/* Offset vectors for remapping */
|
||||
#define PIC1_OFFSET 0x20
|
||||
#define PIC2_OFFSET 0x28
|
||||
|
||||
void pic_init(void);
|
||||
void pic_send_eoi(uint8_t irq);
|
||||
void pic_mask(uint8_t irq);
|
||||
void pic_unmask(uint8_t irq);
|
||||
void pic_disable(void);
|
||||
|
||||
#endif
|
||||
107
kernel/ps2.c
107
kernel/ps2.c
@@ -1,107 +0,0 @@
|
||||
#include "ps2.h"
|
||||
#include "io.h"
|
||||
|
||||
/* --- Controller Synchronization --- */
|
||||
|
||||
// Wait until the controller is ready to receive a byte
|
||||
static void ps2_wait_write() {
|
||||
while (inb(PS2_STATUS_REG) & PS2_STATUS_INPUT);
|
||||
}
|
||||
|
||||
// Wait until the controller has a byte for us to read
|
||||
static void ps2_wait_read() {
|
||||
while (!(inb(PS2_STATUS_REG) & PS2_STATUS_OUTPUT));
|
||||
}
|
||||
|
||||
/* --- Initialization --- */
|
||||
|
||||
void ps2_write_device(uint8_t command) {
|
||||
ps2_wait_write();
|
||||
outb(PS2_DATA_PORT, command);
|
||||
}
|
||||
|
||||
void ps2_write_mouse(uint8_t data) {
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_WRITE_MOUSE); // "Next byte goes to mouse"
|
||||
ps2_wait_write();
|
||||
outb(PS2_DATA_PORT, data);
|
||||
}
|
||||
|
||||
void ps2_init(void) {
|
||||
// 1. Disable Devices
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_DISABLE_KB);
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_DISABLE_MS);
|
||||
|
||||
// 2. Flush Output Buffer
|
||||
while (inb(PS2_STATUS_REG) & PS2_STATUS_OUTPUT) {
|
||||
inb(PS2_DATA_PORT);
|
||||
}
|
||||
|
||||
// 3. Set Controller Configuration Byte
|
||||
// Bit 0: KB Interrupt, Bit 1: Mouse Interrupt, Bit 6: Translation
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_READ_CONFIG);
|
||||
ps2_wait_read();
|
||||
uint8_t status = inb(PS2_DATA_PORT);
|
||||
status |= (1 << 0) | (1 << 1); // Enable IRQ 1 and IRQ 12
|
||||
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_WRITE_CONFIG);
|
||||
ps2_wait_write();
|
||||
outb(PS2_DATA_PORT, status);
|
||||
|
||||
// 4. Enable Devices
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_ENABLE_KB);
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_ENABLE_MS);
|
||||
|
||||
// 5. Initialize Mouse (The mouse won't send IRQs until you tell it to)
|
||||
ps2_write_mouse(MOUSE_CMD_SET_DEFAULTS);
|
||||
ps2_wait_read(); inb(PS2_DATA_PORT); // Read ACK (0xFA)
|
||||
|
||||
ps2_write_mouse(MOUSE_CMD_ENABLE_SCAN);
|
||||
ps2_wait_read(); inb(PS2_DATA_PORT); // Read ACK (0xFA)
|
||||
}
|
||||
|
||||
/* --- IRQ Handlers --- */
|
||||
|
||||
// Called from IRQ 1 (Keyboard)
|
||||
void ps2_keyboard_handler(void) {
|
||||
uint8_t scancode = inb(PS2_DATA_PORT);
|
||||
// Process scancode (e.g., put it into a circular buffer)
|
||||
}
|
||||
|
||||
// Called from IRQ 12 (Mouse)
|
||||
static uint8_t mouse_cycle = 0;
|
||||
static uint8_t mouse_bytes[3];
|
||||
|
||||
void ps2_mouse_handler(void) {
|
||||
uint8_t status = inb(PS2_STATUS_REG);
|
||||
|
||||
// Ensure this is actually mouse data
|
||||
if (!(status & PS2_STATUS_MOUSE)) return;
|
||||
|
||||
mouse_bytes[mouse_cycle++] = inb(PS2_DATA_PORT);
|
||||
|
||||
if (mouse_cycle == 3) {
|
||||
mouse_cycle = 0;
|
||||
|
||||
// Byte 0: Flags (Buttons, Signs)
|
||||
// Byte 1: X Delta
|
||||
// Byte 2: Y Delta
|
||||
|
||||
mouse_state_t state;
|
||||
state.left_button = (mouse_bytes[0] & 0x01);
|
||||
state.right_button = (mouse_bytes[0] & 0x02);
|
||||
state.middle_button = (mouse_bytes[0] & 0x04);
|
||||
|
||||
// Handle negative deltas (signed 9-bit logic)
|
||||
state.x_delta = (int8_t)mouse_bytes[1];
|
||||
state.y_delta = (int8_t)mouse_bytes[2];
|
||||
|
||||
// Update your kernel's internal mouse position here
|
||||
}
|
||||
}
|
||||
45
kernel/ps2.h
45
kernel/ps2.h
@@ -1,45 +0,0 @@
|
||||
#ifndef PS2_H
|
||||
#define PS2_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
/* I/O Ports */
|
||||
#define PS2_DATA_PORT 0x60
|
||||
#define PS2_STATUS_REG 0x64
|
||||
#define PS2_COMMAND_REG 0x64
|
||||
|
||||
/* Status Register Bits */
|
||||
#define PS2_STATUS_OUTPUT 0x01 // 1 = Data ready to be read
|
||||
#define PS2_STATUS_INPUT 0x02 // 1 = Controller busy, don't write yet
|
||||
#define PS2_STATUS_SYS 0x04 // System flag
|
||||
#define PS2_STATUS_CMD_DATA 0x08 // 0 = Data written to 0x60, 1 = Cmd to 0x64
|
||||
#define PS2_STATUS_MOUSE 0x20 // 1 = Mouse data, 0 = Keyboard data
|
||||
|
||||
/* Controller Commands */
|
||||
#define PS2_CMD_READ_CONFIG 0x20
|
||||
#define PS2_CMD_WRITE_CONFIG 0x60
|
||||
#define PS2_CMD_DISABLE_MS 0xA7
|
||||
#define PS2_CMD_ENABLE_MS 0xA8
|
||||
#define PS2_CMD_DISABLE_KB 0xAD
|
||||
#define PS2_CMD_ENABLE_KB 0xAE
|
||||
#define PS2_CMD_WRITE_MOUSE 0xD4
|
||||
|
||||
/* Mouse Commands */
|
||||
#define MOUSE_CMD_SET_DEFAULTS 0xF6
|
||||
#define MOUSE_CMD_ENABLE_SCAN 0xF4
|
||||
|
||||
typedef struct {
|
||||
int8_t x_delta;
|
||||
int8_t y_delta;
|
||||
bool left_button;
|
||||
bool right_button;
|
||||
bool middle_button;
|
||||
} mouse_state_t;
|
||||
|
||||
/* Public API */
|
||||
void ps2_init(void);
|
||||
void ps2_keyboard_handler(void);
|
||||
void ps2_mouse_handler(void);
|
||||
|
||||
#endif
|
||||
@@ -4,8 +4,8 @@
|
||||
#include "print.h"
|
||||
#include "threading.h"
|
||||
|
||||
#define MAX_THREADS 16 // Maximum number of threads
|
||||
#define THREAD_STACK_SIZE 8192 // Stack size for each thread
|
||||
#define MAX_THREADS 16 // Maximum number of threads
|
||||
#define THREAD_STACK_SIZE 8192 // Stack size for each thread
|
||||
|
||||
// The thread table stores information about all threads
|
||||
static Thread thread_table[MAX_THREADS];
|
||||
@@ -16,106 +16,103 @@ static uint32_t num_threads = 0; // Number of active threads
|
||||
static volatile int mutex_locked = 0;
|
||||
|
||||
// Function declaration for context_switch
|
||||
void context_switch(Thread* next);
|
||||
void context_switch(Thread *next);
|
||||
|
||||
// Initialize the threading system
|
||||
void thread_init(void) {
|
||||
memset(thread_table, 0, sizeof(thread_table));
|
||||
num_threads = 0;
|
||||
memset(thread_table, 0, sizeof(thread_table));
|
||||
num_threads = 0;
|
||||
}
|
||||
|
||||
// Create a new thread
|
||||
void thread_create(Thread* thread __attribute__((unused)),
|
||||
void (*start_routine)(void*), void* arg) {
|
||||
if (num_threads >= MAX_THREADS) {
|
||||
my_printf("Error: Maximum thread count reached.\n");
|
||||
return;
|
||||
}
|
||||
void thread_create(Thread *thread __attribute__((unused)), void (*start_routine)(void *), void *arg) {
|
||||
if (num_threads >= MAX_THREADS) {
|
||||
my_printf("Error: Maximum thread count reached.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
// Find an empty slot for the new thread
|
||||
int index = num_threads++;
|
||||
thread_table[index] = (Thread){0};
|
||||
// Find an empty slot for the new thread
|
||||
int index = num_threads++;
|
||||
thread_table[index] = (Thread){0};
|
||||
|
||||
// Set up the new thread
|
||||
thread_table[index].start_routine = start_routine;
|
||||
thread_table[index].arg = arg;
|
||||
thread_table[index].stack_size = THREAD_STACK_SIZE;
|
||||
thread_table[index].stack = (uint32_t*)malloc(THREAD_STACK_SIZE);
|
||||
thread_table[index].stack_top = thread_table[index].stack + THREAD_STACK_SIZE / sizeof(uint32_t);
|
||||
|
||||
// Set up the new thread
|
||||
thread_table[index].start_routine = start_routine;
|
||||
thread_table[index].arg = arg;
|
||||
thread_table[index].stack_size = THREAD_STACK_SIZE;
|
||||
thread_table[index].stack = (uint32_t*)malloc(THREAD_STACK_SIZE);
|
||||
thread_table[index].stack_top =
|
||||
thread_table[index].stack + THREAD_STACK_SIZE / sizeof(uint32_t);
|
||||
// Initialize the stack (simulate pushing the function's return address)
|
||||
uint32_t *stack_top = thread_table[index].stack_top;
|
||||
*(--stack_top) = (uint32_t)start_routine; // Return address (the thread's entry point)
|
||||
*(--stack_top) = (uint32_t)arg; // Argument to pass to the thread
|
||||
|
||||
// Initialize the stack (simulate pushing the function's return address)
|
||||
uint32_t* stack_top = thread_table[index].stack_top;
|
||||
*(--stack_top) =
|
||||
(uint32_t)start_routine; // Return address (the thread's entry point)
|
||||
*(--stack_top) = (uint32_t)arg; // Argument to pass to the thread
|
||||
// Set the thread's state to ready
|
||||
thread_table[index].state = THREAD_READY;
|
||||
|
||||
// Set the thread's state to ready
|
||||
thread_table[index].state = THREAD_READY;
|
||||
|
||||
// If this is the first thread, switch to it
|
||||
if (index == 0) {
|
||||
scheduler();
|
||||
}
|
||||
// If this is the first thread, switch to it
|
||||
if (index == 0) {
|
||||
scheduler();
|
||||
}
|
||||
}
|
||||
|
||||
// Yield the CPU to another thread
|
||||
void thread_yield(void) {
|
||||
// Find the next thread in a round-robin manner
|
||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||
while (next_thread != current_thread &&
|
||||
thread_table[next_thread].state != THREAD_READY) {
|
||||
next_thread = (next_thread + 1) % num_threads;
|
||||
}
|
||||
// Find the next thread in a round-robin manner
|
||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||
while (next_thread != current_thread && thread_table[next_thread].state != THREAD_READY) {
|
||||
next_thread = (next_thread + 1) % num_threads;
|
||||
}
|
||||
|
||||
if (next_thread != current_thread) {
|
||||
current_thread = next_thread;
|
||||
scheduler();
|
||||
}
|
||||
if (next_thread != current_thread) {
|
||||
current_thread = next_thread;
|
||||
scheduler();
|
||||
}
|
||||
}
|
||||
|
||||
// Exit the current thread
|
||||
void thread_exit(void) {
|
||||
thread_table[current_thread].state =
|
||||
THREAD_BLOCKED; // Mark the thread as blocked (finished)
|
||||
free(thread_table[current_thread].stack); // Free the thread's stack
|
||||
num_threads--; // Decrease thread count
|
||||
thread_table[current_thread].state = THREAD_BLOCKED; // Mark the thread as blocked (finished)
|
||||
free(thread_table[current_thread].stack); // Free the thread's stack
|
||||
num_threads--; // Decrease thread count
|
||||
|
||||
// Yield to the next thread
|
||||
thread_yield();
|
||||
// Yield to the next thread
|
||||
thread_yield();
|
||||
}
|
||||
|
||||
// Scheduler: This function selects the next thread to run
|
||||
void scheduler(void) {
|
||||
// Find the next ready thread
|
||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||
while (thread_table[next_thread].state != THREAD_READY) {
|
||||
next_thread = (next_thread + 1) % num_threads;
|
||||
}
|
||||
// Find the next ready thread
|
||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||
while (thread_table[next_thread].state != THREAD_READY) {
|
||||
next_thread = (next_thread + 1) % num_threads;
|
||||
}
|
||||
|
||||
if (next_thread != current_thread) {
|
||||
current_thread = next_thread;
|
||||
context_switch(&thread_table[current_thread]);
|
||||
}
|
||||
if (next_thread != current_thread) {
|
||||
current_thread = next_thread;
|
||||
context_switch(&thread_table[current_thread]);
|
||||
}
|
||||
}
|
||||
|
||||
// Context switch to the next thread (assembly would go here to save/load
|
||||
// registers)
|
||||
void context_switch(Thread* next) {
|
||||
// For simplicity, context switching in this example would involve
|
||||
// saving/restoring registers. In a real system, you would need to save the
|
||||
// CPU state (registers) and restore the next thread's state.
|
||||
my_printf("Switching to thread...\n");
|
||||
next->start_routine(next->arg); // Start running the next thread
|
||||
// Context switch to the next thread (assembly would go here to save/load registers)
|
||||
void context_switch(Thread *next) {
|
||||
// For simplicity, context switching in this example would involve saving/restoring registers.
|
||||
// In a real system, you would need to save the CPU state (registers) and restore the next thread's state.
|
||||
my_printf("Switching to thread...\n");
|
||||
next->start_routine(next->arg); // Start running the next thread
|
||||
}
|
||||
|
||||
// Simple mutex functions (spinlock)
|
||||
void mutex_init(void) { mutex_locked = 0; }
|
||||
|
||||
void mutex_lock(void) {
|
||||
while (__sync_lock_test_and_set(&mutex_locked, 1)) {
|
||||
// Busy wait (spinlock)
|
||||
}
|
||||
void mutex_init(void) {
|
||||
mutex_locked = 0;
|
||||
}
|
||||
|
||||
void mutex_unlock(void) { __sync_lock_release(&mutex_locked); }
|
||||
void mutex_lock(void) {
|
||||
while (__sync_lock_test_and_set(&mutex_locked, 1)) {
|
||||
// Busy wait (spinlock)
|
||||
}
|
||||
}
|
||||
|
||||
void mutex_unlock(void) {
|
||||
__sync_lock_release(&mutex_locked);
|
||||
}
|
||||
|
||||
@@ -3,13 +3,12 @@
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
extern int memcmp(const void *s1, const void *s2, size_t n);
|
||||
extern void *memmove(void *dst, const void *src, size_t n);
|
||||
extern void *memcpy(void *dst, const void *src, size_t n);
|
||||
extern void *memset(void *dst, int c, size_t n);
|
||||
extern int memcmp(const void* s1, const void* s2, size_t n);
|
||||
extern void* memmove(void* dst, const void* src, size_t n);
|
||||
extern void* memcpy(void* dst, const void* src, size_t n);
|
||||
extern void* memset(void* dst, int c, size_t n);
|
||||
|
||||
extern size_t strlen(const char *s);
|
||||
extern int strcmp(const char *s1, const char *s2);
|
||||
extern char *strncpy(char *dst, const char *src, size_t n);
|
||||
extern size_t strlen(const char* s);
|
||||
extern int strcmp(const char* s1, const char* s2);
|
||||
|
||||
#endif // CLASSICOS_KLIBC_STRING_H
|
||||
|
||||
@@ -1,8 +1,8 @@
|
||||
#include <string.h>
|
||||
|
||||
int memcmp(const void *s1, const void *s2, size_t n) {
|
||||
const unsigned char *c1 = s1;
|
||||
const unsigned char *c2 = s2;
|
||||
int memcmp(const void* s1, const void* s2, size_t n) {
|
||||
const unsigned char* c1 = s1;
|
||||
const unsigned char* c2 = s2;
|
||||
int d = 0;
|
||||
|
||||
while (n--) {
|
||||
@@ -13,9 +13,9 @@ int memcmp(const void *s1, const void *s2, size_t n) {
|
||||
return d;
|
||||
}
|
||||
|
||||
void *memmove(void *dst, const void *src, size_t n) {
|
||||
const char *p = src;
|
||||
char *q = dst;
|
||||
void* memmove(void* dst, const void* src, size_t n) {
|
||||
const char* p = src;
|
||||
char* q = dst;
|
||||
#if defined(__i386__) || defined(__x86_64__)
|
||||
if (q < p) {
|
||||
__asm__ volatile("cld; rep; movsb" : "+c"(n), "+S"(p), "+D"(q));
|
||||
@@ -41,19 +41,19 @@ void *memmove(void *dst, const void *src, size_t n) {
|
||||
return dst;
|
||||
}
|
||||
|
||||
void *memcpy(void *dst, const void *src, size_t n) {
|
||||
const char *p = src;
|
||||
char *q = dst;
|
||||
void* memcpy(void* dst, const void* src, size_t n) {
|
||||
const char* p = src;
|
||||
char* q = dst;
|
||||
#if defined(__i386__)
|
||||
size_t nl = n >> 2;
|
||||
__asm__ volatile("cld ; rep ; movsl ; movl %3,%0 ; rep ; movsb"
|
||||
: "+c"(nl), "+S"(p), "+D"(q)
|
||||
: "r"(n & 3));
|
||||
: "+c"(nl), "+S"(p), "+D"(q)
|
||||
: "r"(n & 3));
|
||||
#elif defined(__x86_64__)
|
||||
size_t nq = n >> 3;
|
||||
__asm__ volatile("cld ; rep ; movsq ; movl %3,%%ecx ; rep ; movsb"
|
||||
: "+c"(nq), "+S"(p), "+D"(q)
|
||||
: "r"((uint32_t)(n & 7)));
|
||||
: "+c"(nq), "+S"(p), "+D"(q)
|
||||
: "r"((uint32_t)(n & 7)));
|
||||
#else
|
||||
while (n--) {
|
||||
*q++ = *p++;
|
||||
@@ -63,20 +63,20 @@ void *memcpy(void *dst, const void *src, size_t n) {
|
||||
return dst;
|
||||
}
|
||||
|
||||
void *memset(void *dst, int c, size_t n) {
|
||||
char *q = dst;
|
||||
void* memset(void* dst, int c, size_t n) {
|
||||
char* q = dst;
|
||||
|
||||
#if defined(__i386__)
|
||||
size_t nl = n >> 2;
|
||||
__asm__ volatile("cld ; rep ; stosl ; movl %3,%0 ; rep ; stosb"
|
||||
: "+c"(nl), "+D"(q)
|
||||
: "a"((unsigned char)c * 0x01010101U), "r"(n & 3));
|
||||
: "+c"(nl), "+D"(q)
|
||||
: "a"((unsigned char)c * 0x01010101U), "r"(n & 3));
|
||||
#elif defined(__x86_64__)
|
||||
size_t nq = n >> 3;
|
||||
__asm__ volatile("cld ; rep ; stosq ; movl %3,%%ecx ; rep ; stosb"
|
||||
: "+c"(nq), "+D"(q)
|
||||
: "a"((unsigned char)c * 0x0101010101010101U),
|
||||
"r"((uint32_t)n & 7));
|
||||
: "+c"(nq), "+D"(q)
|
||||
: "a"((unsigned char)c * 0x0101010101010101U),
|
||||
"r"((uint32_t)n & 7));
|
||||
#else
|
||||
while (n--) {
|
||||
*q++ = c;
|
||||
@@ -86,15 +86,15 @@ void *memset(void *dst, int c, size_t n) {
|
||||
return dst;
|
||||
}
|
||||
|
||||
size_t strlen(const char *s) {
|
||||
const char *ss = s;
|
||||
size_t strlen(const char* s) {
|
||||
const char* ss = s;
|
||||
while (*ss) ss++;
|
||||
return ss - s;
|
||||
}
|
||||
|
||||
int strcmp(const char *s1, const char *s2) {
|
||||
const unsigned char *c1 = (const unsigned char *)s1;
|
||||
const unsigned char *c2 = (const unsigned char *)s2;
|
||||
int strcmp(const char* s1, const char* s2) {
|
||||
const unsigned char* c1 = (const unsigned char*)s1;
|
||||
const unsigned char* c2 = (const unsigned char*)s2;
|
||||
unsigned char ch;
|
||||
int d = 0;
|
||||
|
||||
@@ -105,19 +105,3 @@ int strcmp(const char *s1, const char *s2) {
|
||||
|
||||
return d;
|
||||
}
|
||||
|
||||
char *strncpy(char *dst, const char *src, size_t n) {
|
||||
char *q = dst;
|
||||
const char *p = src;
|
||||
char ch;
|
||||
|
||||
while (n) {
|
||||
n--;
|
||||
*q++ = ch = *p++;
|
||||
if (!ch) break;
|
||||
}
|
||||
|
||||
memset(q, 0, n);
|
||||
|
||||
return dst;
|
||||
}
|
||||
|
||||
76
pic.c
Normal file
76
pic.c
Normal file
@@ -0,0 +1,76 @@
|
||||
#include "pic.h"
|
||||
#include "io.h"
|
||||
|
||||
/* Small delay for older hardware bus timing */
|
||||
static inline void io_wait(void) {
|
||||
outb(0x80, 0);
|
||||
}
|
||||
|
||||
void pic_init(void) {
|
||||
uint8_t a1, a2;
|
||||
|
||||
// Save current masks
|
||||
a1 = inb(PIC1_DATA);
|
||||
a2 = inb(PIC2_DATA);
|
||||
|
||||
// ICW1: Start initialization in cascade mode
|
||||
outb(PIC1_COMMAND, 0x11);
|
||||
io_wait();
|
||||
outb(PIC2_COMMAND, 0x11);
|
||||
io_wait();
|
||||
|
||||
// ICW2: Master PIC vector offset
|
||||
outb(PIC1_DATA, PIC1_OFFSET);
|
||||
io_wait();
|
||||
// ICW2: Slave PIC vector offset
|
||||
outb(PIC2_DATA, PIC2_OFFSET);
|
||||
io_wait();
|
||||
|
||||
// ICW3: Tell Master there is a slave at IRQ2 (0000 0100)
|
||||
outb(PIC1_DATA, 4);
|
||||
io_wait();
|
||||
// ICW3: Tell Slave its cascade identity (0000 0010)
|
||||
outb(PIC2_DATA, 2);
|
||||
io_wait();
|
||||
|
||||
// ICW4: Set 8086/88 mode
|
||||
outb(PIC1_DATA, 0x01);
|
||||
io_wait();
|
||||
outb(PIC2_DATA, 0x01);
|
||||
io_wait();
|
||||
|
||||
// Restore masks (or disable all to start clean)
|
||||
outb(PIC1_DATA, 0xFB); // Keep IRQ2 (cascade) open
|
||||
outb(PIC2_DATA, 0xFF);
|
||||
}
|
||||
|
||||
void pic_send_eoi(uint8_t irq) {
|
||||
if (irq >= 8) {
|
||||
outb(PIC2_COMMAND, PIC_EOI);
|
||||
}
|
||||
outb(PIC1_COMMAND, PIC_EOI);
|
||||
}
|
||||
|
||||
void pic_unmask(uint8_t irq) {
|
||||
uint16_t port;
|
||||
if (irq < 8) {
|
||||
port = PIC1_DATA;
|
||||
} else {
|
||||
port = PIC2_DATA;
|
||||
irq -= 8;
|
||||
}
|
||||
uint8_t value = inb(port) & ~(1 << irq);
|
||||
outb(port, value);
|
||||
}
|
||||
|
||||
void pic_mask(uint8_t irq) {
|
||||
uint16_t port;
|
||||
if (irq < 8) {
|
||||
port = PIC1_DATA;
|
||||
} else {
|
||||
port = PIC2_DATA;
|
||||
irq -= 8;
|
||||
}
|
||||
uint8_t value = inb(port) | (1 << irq);
|
||||
outb(port, value);
|
||||
}
|
||||
Reference in New Issue
Block a user