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gbowne1-ad
| Author | SHA1 | Date | |
|---|---|---|---|
| 95372a66e6 | |||
| e376526426 |
@@ -1,86 +0,0 @@
|
||||
#include "cmos.h"
|
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#include "io.h"
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#include "print.h"
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#define CMOS_ADDR 0x70
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#define CMOS_DATA 0x71
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enum {
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CMOS_SEC = 0x00,
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CMOS_MIN = 0x02,
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CMOS_HOUR = 0x04,
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CMOS_DAY = 0x07,
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CMOS_MONTH= 0x08,
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CMOS_YEAR = 0x09,
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CMOS_STAT_A = 0x0A,
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CMOS_STAT_B = 0x0B
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};
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// Check if CMOS is currently updating its values
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static int is_updating() {
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outb(CMOS_ADDR, CMOS_STAT_A);
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return (inb(CMOS_DATA) & 0x80);
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}
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static uint8_t get_register(int reg) {
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outb(CMOS_ADDR, reg);
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return inb(CMOS_DATA);
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}
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void cmos_read_time(cmos_time_t* time) {
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// Wait for any current update to finish
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while (is_updating());
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uint8_t sec = get_register(CMOS_SEC);
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uint8_t min = get_register(CMOS_MIN);
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uint8_t hour = get_register(CMOS_HOUR);
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uint8_t day = get_register(CMOS_DAY);
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uint8_t month = get_register(CMOS_MONTH);
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uint8_t year = get_register(CMOS_YEAR);
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uint8_t statb = get_register(CMOS_STAT_B);
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// If Bit 2 of Status Register B is 0, then values are BCD
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if (!(statb & 0x04)) {
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time->second = (sec & 0x0F) + ((sec / 16) * 10);
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time->minute = (min & 0x0F) + ((min / 16) * 10);
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time->hour = ((hour & 0x0F) + (((hour & 0x70) / 16) * 10)) | (hour & 0x80);
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time->day = (day & 0x0F) + ((day / 16) * 10);
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time->month = (month & 0x0F) + ((month / 16) * 10);
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time->year = (year & 0x0F) + ((year / 16) * 10);
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} else {
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time->second = sec;
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time->minute = min;
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time->hour = hour;
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time->day = day;
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time->month = month;
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time->year = year;
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}
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// Adjust for Century (assuming we are in the 2000s for ClassicOS)
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time->year += 2000;
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}
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void cmos_print_time(cmos_time_t* time) {
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// Using your print_string/itoa style logic
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char buf[16];
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print_string("System Time: ");
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// Simple padding check for minutes
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print_hex(time->hour, 0, 1);
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print_string(":");
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if (time->minute < 10) print_string("0");
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print_hex(time->minute, 0, 1);
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print_string(":");
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if (time->second < 10) print_string("0");
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print_hex(time->second, 0, 1);
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print_string(" ");
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print_hex(time->month, 0, 1);
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print_string("/");
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print_hex(time->day, 0, 1);
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print_string("/");
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print_hex(time->year, 0, 1);
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print_string("\n");
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}
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@@ -1,18 +0,0 @@
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#ifndef CMOS_H
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#define CMOS_H
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#include <stdint.h>
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typedef struct {
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uint8_t second;
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uint8_t minute;
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uint8_t hour;
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uint8_t day;
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uint8_t month;
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uint32_t year;
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} cmos_time_t;
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void cmos_read_time(cmos_time_t* time);
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void cmos_print_time(cmos_time_t* time);
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#endif
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109
kernel/pci.c
109
kernel/pci.c
@@ -1,109 +0,0 @@
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#include "pci.h"
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#include "io.h"
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/* --- Configuration Access Functions --- */
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uint32_t pci_config_read_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
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uint32_t address = (uint32_t)((uint32_t)1 << 31) |
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((uint32_t)bus << 16) |
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((uint32_t)slot << 11) |
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((uint32_t)func << 8) |
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(offset & 0xFC);
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outl(PCI_CONFIG_ADDRESS, address);
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return inl(PCI_CONFIG_DATA);
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}
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void pci_config_write_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t data) {
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uint32_t address = (uint32_t)((uint32_t)1 << 31) |
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((uint32_t)bus << 16) |
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((uint32_t)slot << 11) |
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((uint32_t)func << 8) |
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(offset & 0xFC);
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outl(PCI_CONFIG_ADDRESS, address);
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outl(PCI_CONFIG_DATA, data);
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}
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/* To read a word or byte, we read the Dword and shift/mask */
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uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
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uint32_t dword = pci_config_read_dword(bus, slot, func, offset);
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return (uint16_t)((dword >> ((offset & 2) * 8)) & 0xFFFF);
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}
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uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
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uint32_t dword = pci_config_read_dword(bus, slot, func, offset);
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return (uint8_t)((dword >> ((offset & 3) * 8)) & 0xFF);
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}
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/* --- BAR Decoding Logic --- */
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pci_bar_t pci_get_bar(uint8_t bus, uint8_t slot, uint8_t func, uint8_t bar_index) {
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pci_bar_t bar = {0};
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uint8_t offset = PCI_REG_BAR0 + (bar_index * 4);
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uint32_t initial_val = pci_config_read_dword(bus, slot, func, offset);
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// The Size Masking Trick
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pci_config_write_dword(bus, slot, func, offset, 0xFFFFFFFF);
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uint32_t mask = pci_config_read_dword(bus, slot, func, offset);
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pci_config_write_dword(bus, slot, func, offset, initial_val); // Restore
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if (initial_val & 0x1) {
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// I/O Space BAR
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bar.is_io = true;
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bar.base_address = initial_val & 0xFFFFFFFC;
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bar.size = ~(mask & 0xFFFFFFFC) + 1;
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} else {
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// Memory Space BAR
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bar.is_io = false;
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bar.base_address = initial_val & 0xFFFFFFF0;
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bar.is_prefetchable = (initial_val & 0x8) != 0;
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bar.size = ~(mask & 0xFFFFFFF0) + 1;
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}
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return bar;
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}
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/* --- Enumeration and Discovery --- */
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void pci_check_function(uint8_t bus, uint8_t slot, uint8_t func) {
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uint16_t vendor_id = pci_config_read_word(bus, slot, func, PCI_REG_VENDOR_ID);
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if (vendor_id == 0xFFFF) return;
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uint16_t device_id = pci_config_read_word(bus, slot, func, PCI_REG_DEVICE_ID);
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uint8_t class_code = pci_config_read_byte(bus, slot, func, PCI_REG_CLASS);
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/* Optional: Set Master Latency Timer if it is 0.
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A value of 32 (0x20) or 64 (0x40) is typical.
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*/
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uint8_t latency = pci_config_read_byte(bus, slot, func, PCI_REG_LATENCY_TIMER);
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if (latency == 0) {
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// pci_config_write_byte would be needed here, or write a dword with the byte modified
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uint32_t reg_0c = pci_config_read_dword(bus, slot, func, 0x0C);
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reg_0c |= (0x20 << 8); // Set latency to 32
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pci_config_write_dword(bus, slot, func, 0x0C, reg_0c);
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}
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// Replace with your kernel's print/logging function
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// printf("Found PCI Device: %x:%x Class: %x at %d:%d:%d\n", vendor_id, device_id, class_code, bus, slot, func);
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}
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void pci_init(void) {
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for (uint16_t bus = 0; bus < 256; bus++) {
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for (uint8_t slot = 0; slot < 32; slot++) {
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// Check Function 0 first
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uint16_t vendor = pci_config_read_word(bus, slot, 0, PCI_REG_VENDOR_ID);
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if (vendor == 0xFFFF) continue;
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pci_check_function(bus, slot, 0);
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// Check if this is a multi-function device
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uint8_t header_type = pci_config_read_byte(bus, slot, 0, PCI_REG_HEADER_TYPE);
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if (header_type & 0x80) {
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// Check functions 1-7
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for (uint8_t func = 1; func < 8; func++) {
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pci_check_function(bus, slot, func);
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}
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}
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}
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}
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}
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60
kernel/pci.h
60
kernel/pci.h
@@ -1,60 +0,0 @@
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#ifndef PCI_H
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#define PCI_H
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#include <stdint.h>
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#include <stdbool.h>
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/* I/O Ports for PCI Configuration Mechanism #1 */
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#define PCI_CONFIG_ADDRESS 0xCF8
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#define PCI_CONFIG_DATA 0xCFC
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/* Common PCI Configuration Register Offsets */
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#define PCI_REG_VENDOR_ID 0x00
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#define PCI_REG_DEVICE_ID 0x02
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#define PCI_REG_COMMAND 0x04
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#define PCI_REG_STATUS 0x06
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#define PCI_REG_REVISION_ID 0x08
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#define PCI_REG_PROG_IF 0x09
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#define PCI_REG_SUBCLASS 0x0A
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#define PCI_REG_CLASS 0x0B
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#define PCI_REG_CACHE_LINE_SIZE 0x0C
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#define PCI_REG_LATENCY_TIMER 0x0D
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#define PCI_REG_HEADER_TYPE 0x0E
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#define PCI_REG_BIST 0x0F
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#define PCI_REG_BAR0 0x10
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#define PCI_REG_BAR1 0x14
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#define PCI_REG_BAR2 0x18
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#define PCI_REG_BAR3 0x1C
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#define PCI_REG_BAR4 0x20
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#define PCI_REG_BAR5 0x24
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#define PCI_REG_INTERRUPT_LINE 0x3C
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typedef struct {
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uint32_t base_address;
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uint32_t size;
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bool is_io;
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bool is_prefetchable; // Only for Memory BARs
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} pci_bar_t;
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typedef struct {
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uint8_t bus;
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uint8_t device;
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uint8_t function;
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uint16_t vendor_id;
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uint16_t device_id;
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uint8_t class_code;
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uint8_t subclass;
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uint8_t interrupt_line;
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} pci_dev_t;
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/* Function Prototypes */
|
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uint32_t pci_config_read_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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void pci_config_write_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t data);
|
||||
|
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uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
||||
uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
||||
|
||||
pci_bar_t pci_get_bar(uint8_t bus, uint8_t slot, uint8_t func, uint8_t bar_index);
|
||||
void pci_init(void);
|
||||
|
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#endif
|
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25
kernel/pic.h
Normal file
25
kernel/pic.h
Normal file
@@ -0,0 +1,25 @@
|
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#ifndef PIC_H
|
||||
#define PIC_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* I/O Ports for the PICs */
|
||||
#define PIC1_COMMAND 0x20
|
||||
#define PIC1_DATA 0x21
|
||||
#define PIC2_COMMAND 0xA0
|
||||
#define PIC2_DATA 0xA1
|
||||
|
||||
/* PIC Commands */
|
||||
#define PIC_EOI 0x20 /* End of Interrupt */
|
||||
|
||||
/* Offset vectors for remapping */
|
||||
#define PIC1_OFFSET 0x20
|
||||
#define PIC2_OFFSET 0x28
|
||||
|
||||
void pic_init(void);
|
||||
void pic_send_eoi(uint8_t irq);
|
||||
void pic_mask(uint8_t irq);
|
||||
void pic_unmask(uint8_t irq);
|
||||
void pic_disable(void);
|
||||
|
||||
#endif
|
||||
107
kernel/ps2.c
107
kernel/ps2.c
@@ -1,107 +0,0 @@
|
||||
#include "ps2.h"
|
||||
#include "io.h"
|
||||
|
||||
/* --- Controller Synchronization --- */
|
||||
|
||||
// Wait until the controller is ready to receive a byte
|
||||
static void ps2_wait_write() {
|
||||
while (inb(PS2_STATUS_REG) & PS2_STATUS_INPUT);
|
||||
}
|
||||
|
||||
// Wait until the controller has a byte for us to read
|
||||
static void ps2_wait_read() {
|
||||
while (!(inb(PS2_STATUS_REG) & PS2_STATUS_OUTPUT));
|
||||
}
|
||||
|
||||
/* --- Initialization --- */
|
||||
|
||||
void ps2_write_device(uint8_t command) {
|
||||
ps2_wait_write();
|
||||
outb(PS2_DATA_PORT, command);
|
||||
}
|
||||
|
||||
void ps2_write_mouse(uint8_t data) {
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_WRITE_MOUSE); // "Next byte goes to mouse"
|
||||
ps2_wait_write();
|
||||
outb(PS2_DATA_PORT, data);
|
||||
}
|
||||
|
||||
void ps2_init(void) {
|
||||
// 1. Disable Devices
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_DISABLE_KB);
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_DISABLE_MS);
|
||||
|
||||
// 2. Flush Output Buffer
|
||||
while (inb(PS2_STATUS_REG) & PS2_STATUS_OUTPUT) {
|
||||
inb(PS2_DATA_PORT);
|
||||
}
|
||||
|
||||
// 3. Set Controller Configuration Byte
|
||||
// Bit 0: KB Interrupt, Bit 1: Mouse Interrupt, Bit 6: Translation
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_READ_CONFIG);
|
||||
ps2_wait_read();
|
||||
uint8_t status = inb(PS2_DATA_PORT);
|
||||
status |= (1 << 0) | (1 << 1); // Enable IRQ 1 and IRQ 12
|
||||
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_WRITE_CONFIG);
|
||||
ps2_wait_write();
|
||||
outb(PS2_DATA_PORT, status);
|
||||
|
||||
// 4. Enable Devices
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_ENABLE_KB);
|
||||
ps2_wait_write();
|
||||
outb(PS2_COMMAND_REG, PS2_CMD_ENABLE_MS);
|
||||
|
||||
// 5. Initialize Mouse (The mouse won't send IRQs until you tell it to)
|
||||
ps2_write_mouse(MOUSE_CMD_SET_DEFAULTS);
|
||||
ps2_wait_read(); inb(PS2_DATA_PORT); // Read ACK (0xFA)
|
||||
|
||||
ps2_write_mouse(MOUSE_CMD_ENABLE_SCAN);
|
||||
ps2_wait_read(); inb(PS2_DATA_PORT); // Read ACK (0xFA)
|
||||
}
|
||||
|
||||
/* --- IRQ Handlers --- */
|
||||
|
||||
// Called from IRQ 1 (Keyboard)
|
||||
void ps2_keyboard_handler(void) {
|
||||
uint8_t scancode = inb(PS2_DATA_PORT);
|
||||
// Process scancode (e.g., put it into a circular buffer)
|
||||
}
|
||||
|
||||
// Called from IRQ 12 (Mouse)
|
||||
static uint8_t mouse_cycle = 0;
|
||||
static uint8_t mouse_bytes[3];
|
||||
|
||||
void ps2_mouse_handler(void) {
|
||||
uint8_t status = inb(PS2_STATUS_REG);
|
||||
|
||||
// Ensure this is actually mouse data
|
||||
if (!(status & PS2_STATUS_MOUSE)) return;
|
||||
|
||||
mouse_bytes[mouse_cycle++] = inb(PS2_DATA_PORT);
|
||||
|
||||
if (mouse_cycle == 3) {
|
||||
mouse_cycle = 0;
|
||||
|
||||
// Byte 0: Flags (Buttons, Signs)
|
||||
// Byte 1: X Delta
|
||||
// Byte 2: Y Delta
|
||||
|
||||
mouse_state_t state;
|
||||
state.left_button = (mouse_bytes[0] & 0x01);
|
||||
state.right_button = (mouse_bytes[0] & 0x02);
|
||||
state.middle_button = (mouse_bytes[0] & 0x04);
|
||||
|
||||
// Handle negative deltas (signed 9-bit logic)
|
||||
state.x_delta = (int8_t)mouse_bytes[1];
|
||||
state.y_delta = (int8_t)mouse_bytes[2];
|
||||
|
||||
// Update your kernel's internal mouse position here
|
||||
}
|
||||
}
|
||||
45
kernel/ps2.h
45
kernel/ps2.h
@@ -1,45 +0,0 @@
|
||||
#ifndef PS2_H
|
||||
#define PS2_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
/* I/O Ports */
|
||||
#define PS2_DATA_PORT 0x60
|
||||
#define PS2_STATUS_REG 0x64
|
||||
#define PS2_COMMAND_REG 0x64
|
||||
|
||||
/* Status Register Bits */
|
||||
#define PS2_STATUS_OUTPUT 0x01 // 1 = Data ready to be read
|
||||
#define PS2_STATUS_INPUT 0x02 // 1 = Controller busy, don't write yet
|
||||
#define PS2_STATUS_SYS 0x04 // System flag
|
||||
#define PS2_STATUS_CMD_DATA 0x08 // 0 = Data written to 0x60, 1 = Cmd to 0x64
|
||||
#define PS2_STATUS_MOUSE 0x20 // 1 = Mouse data, 0 = Keyboard data
|
||||
|
||||
/* Controller Commands */
|
||||
#define PS2_CMD_READ_CONFIG 0x20
|
||||
#define PS2_CMD_WRITE_CONFIG 0x60
|
||||
#define PS2_CMD_DISABLE_MS 0xA7
|
||||
#define PS2_CMD_ENABLE_MS 0xA8
|
||||
#define PS2_CMD_DISABLE_KB 0xAD
|
||||
#define PS2_CMD_ENABLE_KB 0xAE
|
||||
#define PS2_CMD_WRITE_MOUSE 0xD4
|
||||
|
||||
/* Mouse Commands */
|
||||
#define MOUSE_CMD_SET_DEFAULTS 0xF6
|
||||
#define MOUSE_CMD_ENABLE_SCAN 0xF4
|
||||
|
||||
typedef struct {
|
||||
int8_t x_delta;
|
||||
int8_t y_delta;
|
||||
bool left_button;
|
||||
bool right_button;
|
||||
bool middle_button;
|
||||
} mouse_state_t;
|
||||
|
||||
/* Public API */
|
||||
void ps2_init(void);
|
||||
void ps2_keyboard_handler(void);
|
||||
void ps2_mouse_handler(void);
|
||||
|
||||
#endif
|
||||
@@ -4,8 +4,8 @@
|
||||
#include "print.h"
|
||||
#include "threading.h"
|
||||
|
||||
#define MAX_THREADS 16 // Maximum number of threads
|
||||
#define THREAD_STACK_SIZE 8192 // Stack size for each thread
|
||||
#define MAX_THREADS 16 // Maximum number of threads
|
||||
#define THREAD_STACK_SIZE 8192 // Stack size for each thread
|
||||
|
||||
// The thread table stores information about all threads
|
||||
static Thread thread_table[MAX_THREADS];
|
||||
@@ -16,106 +16,103 @@ static uint32_t num_threads = 0; // Number of active threads
|
||||
static volatile int mutex_locked = 0;
|
||||
|
||||
// Function declaration for context_switch
|
||||
void context_switch(Thread* next);
|
||||
void context_switch(Thread *next);
|
||||
|
||||
// Initialize the threading system
|
||||
void thread_init(void) {
|
||||
memset(thread_table, 0, sizeof(thread_table));
|
||||
num_threads = 0;
|
||||
memset(thread_table, 0, sizeof(thread_table));
|
||||
num_threads = 0;
|
||||
}
|
||||
|
||||
// Create a new thread
|
||||
void thread_create(Thread* thread __attribute__((unused)),
|
||||
void (*start_routine)(void*), void* arg) {
|
||||
if (num_threads >= MAX_THREADS) {
|
||||
my_printf("Error: Maximum thread count reached.\n");
|
||||
return;
|
||||
}
|
||||
void thread_create(Thread *thread __attribute__((unused)), void (*start_routine)(void *), void *arg) {
|
||||
if (num_threads >= MAX_THREADS) {
|
||||
my_printf("Error: Maximum thread count reached.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
// Find an empty slot for the new thread
|
||||
int index = num_threads++;
|
||||
thread_table[index] = (Thread){0};
|
||||
// Find an empty slot for the new thread
|
||||
int index = num_threads++;
|
||||
thread_table[index] = (Thread){0};
|
||||
|
||||
// Set up the new thread
|
||||
thread_table[index].start_routine = start_routine;
|
||||
thread_table[index].arg = arg;
|
||||
thread_table[index].stack_size = THREAD_STACK_SIZE;
|
||||
thread_table[index].stack = (uint32_t*)malloc(THREAD_STACK_SIZE);
|
||||
thread_table[index].stack_top = thread_table[index].stack + THREAD_STACK_SIZE / sizeof(uint32_t);
|
||||
|
||||
// Set up the new thread
|
||||
thread_table[index].start_routine = start_routine;
|
||||
thread_table[index].arg = arg;
|
||||
thread_table[index].stack_size = THREAD_STACK_SIZE;
|
||||
thread_table[index].stack = (uint32_t*)malloc(THREAD_STACK_SIZE);
|
||||
thread_table[index].stack_top =
|
||||
thread_table[index].stack + THREAD_STACK_SIZE / sizeof(uint32_t);
|
||||
// Initialize the stack (simulate pushing the function's return address)
|
||||
uint32_t *stack_top = thread_table[index].stack_top;
|
||||
*(--stack_top) = (uint32_t)start_routine; // Return address (the thread's entry point)
|
||||
*(--stack_top) = (uint32_t)arg; // Argument to pass to the thread
|
||||
|
||||
// Initialize the stack (simulate pushing the function's return address)
|
||||
uint32_t* stack_top = thread_table[index].stack_top;
|
||||
*(--stack_top) =
|
||||
(uint32_t)start_routine; // Return address (the thread's entry point)
|
||||
*(--stack_top) = (uint32_t)arg; // Argument to pass to the thread
|
||||
// Set the thread's state to ready
|
||||
thread_table[index].state = THREAD_READY;
|
||||
|
||||
// Set the thread's state to ready
|
||||
thread_table[index].state = THREAD_READY;
|
||||
|
||||
// If this is the first thread, switch to it
|
||||
if (index == 0) {
|
||||
scheduler();
|
||||
}
|
||||
// If this is the first thread, switch to it
|
||||
if (index == 0) {
|
||||
scheduler();
|
||||
}
|
||||
}
|
||||
|
||||
// Yield the CPU to another thread
|
||||
void thread_yield(void) {
|
||||
// Find the next thread in a round-robin manner
|
||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||
while (next_thread != current_thread &&
|
||||
thread_table[next_thread].state != THREAD_READY) {
|
||||
next_thread = (next_thread + 1) % num_threads;
|
||||
}
|
||||
// Find the next thread in a round-robin manner
|
||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||
while (next_thread != current_thread && thread_table[next_thread].state != THREAD_READY) {
|
||||
next_thread = (next_thread + 1) % num_threads;
|
||||
}
|
||||
|
||||
if (next_thread != current_thread) {
|
||||
current_thread = next_thread;
|
||||
scheduler();
|
||||
}
|
||||
if (next_thread != current_thread) {
|
||||
current_thread = next_thread;
|
||||
scheduler();
|
||||
}
|
||||
}
|
||||
|
||||
// Exit the current thread
|
||||
void thread_exit(void) {
|
||||
thread_table[current_thread].state =
|
||||
THREAD_BLOCKED; // Mark the thread as blocked (finished)
|
||||
free(thread_table[current_thread].stack); // Free the thread's stack
|
||||
num_threads--; // Decrease thread count
|
||||
thread_table[current_thread].state = THREAD_BLOCKED; // Mark the thread as blocked (finished)
|
||||
free(thread_table[current_thread].stack); // Free the thread's stack
|
||||
num_threads--; // Decrease thread count
|
||||
|
||||
// Yield to the next thread
|
||||
thread_yield();
|
||||
// Yield to the next thread
|
||||
thread_yield();
|
||||
}
|
||||
|
||||
// Scheduler: This function selects the next thread to run
|
||||
void scheduler(void) {
|
||||
// Find the next ready thread
|
||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||
while (thread_table[next_thread].state != THREAD_READY) {
|
||||
next_thread = (next_thread + 1) % num_threads;
|
||||
}
|
||||
// Find the next ready thread
|
||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||
while (thread_table[next_thread].state != THREAD_READY) {
|
||||
next_thread = (next_thread + 1) % num_threads;
|
||||
}
|
||||
|
||||
if (next_thread != current_thread) {
|
||||
current_thread = next_thread;
|
||||
context_switch(&thread_table[current_thread]);
|
||||
}
|
||||
if (next_thread != current_thread) {
|
||||
current_thread = next_thread;
|
||||
context_switch(&thread_table[current_thread]);
|
||||
}
|
||||
}
|
||||
|
||||
// Context switch to the next thread (assembly would go here to save/load
|
||||
// registers)
|
||||
void context_switch(Thread* next) {
|
||||
// For simplicity, context switching in this example would involve
|
||||
// saving/restoring registers. In a real system, you would need to save the
|
||||
// CPU state (registers) and restore the next thread's state.
|
||||
my_printf("Switching to thread...\n");
|
||||
next->start_routine(next->arg); // Start running the next thread
|
||||
// Context switch to the next thread (assembly would go here to save/load registers)
|
||||
void context_switch(Thread *next) {
|
||||
// For simplicity, context switching in this example would involve saving/restoring registers.
|
||||
// In a real system, you would need to save the CPU state (registers) and restore the next thread's state.
|
||||
my_printf("Switching to thread...\n");
|
||||
next->start_routine(next->arg); // Start running the next thread
|
||||
}
|
||||
|
||||
// Simple mutex functions (spinlock)
|
||||
void mutex_init(void) { mutex_locked = 0; }
|
||||
|
||||
void mutex_lock(void) {
|
||||
while (__sync_lock_test_and_set(&mutex_locked, 1)) {
|
||||
// Busy wait (spinlock)
|
||||
}
|
||||
void mutex_init(void) {
|
||||
mutex_locked = 0;
|
||||
}
|
||||
|
||||
void mutex_unlock(void) { __sync_lock_release(&mutex_locked); }
|
||||
void mutex_lock(void) {
|
||||
while (__sync_lock_test_and_set(&mutex_locked, 1)) {
|
||||
// Busy wait (spinlock)
|
||||
}
|
||||
}
|
||||
|
||||
void mutex_unlock(void) {
|
||||
__sync_lock_release(&mutex_locked);
|
||||
}
|
||||
|
||||
76
pic.c
Normal file
76
pic.c
Normal file
@@ -0,0 +1,76 @@
|
||||
#include "pic.h"
|
||||
#include "io.h"
|
||||
|
||||
/* Small delay for older hardware bus timing */
|
||||
static inline void io_wait(void) {
|
||||
outb(0x80, 0);
|
||||
}
|
||||
|
||||
void pic_init(void) {
|
||||
uint8_t a1, a2;
|
||||
|
||||
// Save current masks
|
||||
a1 = inb(PIC1_DATA);
|
||||
a2 = inb(PIC2_DATA);
|
||||
|
||||
// ICW1: Start initialization in cascade mode
|
||||
outb(PIC1_COMMAND, 0x11);
|
||||
io_wait();
|
||||
outb(PIC2_COMMAND, 0x11);
|
||||
io_wait();
|
||||
|
||||
// ICW2: Master PIC vector offset
|
||||
outb(PIC1_DATA, PIC1_OFFSET);
|
||||
io_wait();
|
||||
// ICW2: Slave PIC vector offset
|
||||
outb(PIC2_DATA, PIC2_OFFSET);
|
||||
io_wait();
|
||||
|
||||
// ICW3: Tell Master there is a slave at IRQ2 (0000 0100)
|
||||
outb(PIC1_DATA, 4);
|
||||
io_wait();
|
||||
// ICW3: Tell Slave its cascade identity (0000 0010)
|
||||
outb(PIC2_DATA, 2);
|
||||
io_wait();
|
||||
|
||||
// ICW4: Set 8086/88 mode
|
||||
outb(PIC1_DATA, 0x01);
|
||||
io_wait();
|
||||
outb(PIC2_DATA, 0x01);
|
||||
io_wait();
|
||||
|
||||
// Restore masks (or disable all to start clean)
|
||||
outb(PIC1_DATA, 0xFB); // Keep IRQ2 (cascade) open
|
||||
outb(PIC2_DATA, 0xFF);
|
||||
}
|
||||
|
||||
void pic_send_eoi(uint8_t irq) {
|
||||
if (irq >= 8) {
|
||||
outb(PIC2_COMMAND, PIC_EOI);
|
||||
}
|
||||
outb(PIC1_COMMAND, PIC_EOI);
|
||||
}
|
||||
|
||||
void pic_unmask(uint8_t irq) {
|
||||
uint16_t port;
|
||||
if (irq < 8) {
|
||||
port = PIC1_DATA;
|
||||
} else {
|
||||
port = PIC2_DATA;
|
||||
irq -= 8;
|
||||
}
|
||||
uint8_t value = inb(port) & ~(1 << irq);
|
||||
outb(port, value);
|
||||
}
|
||||
|
||||
void pic_mask(uint8_t irq) {
|
||||
uint16_t port;
|
||||
if (irq < 8) {
|
||||
port = PIC1_DATA;
|
||||
} else {
|
||||
port = PIC2_DATA;
|
||||
irq -= 8;
|
||||
}
|
||||
uint8_t value = inb(port) | (1 << irq);
|
||||
outb(port, value);
|
||||
}
|
||||
Reference in New Issue
Block a user