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86
kernel/cmos.c
Normal file
86
kernel/cmos.c
Normal file
@@ -0,0 +1,86 @@
|
|||||||
|
#include "cmos.h"
|
||||||
|
#include "io.h"
|
||||||
|
#include "print.h"
|
||||||
|
|
||||||
|
#define CMOS_ADDR 0x70
|
||||||
|
#define CMOS_DATA 0x71
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||||||
|
|
||||||
|
enum {
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||||||
|
CMOS_SEC = 0x00,
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||||||
|
CMOS_MIN = 0x02,
|
||||||
|
CMOS_HOUR = 0x04,
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||||||
|
CMOS_DAY = 0x07,
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||||||
|
CMOS_MONTH= 0x08,
|
||||||
|
CMOS_YEAR = 0x09,
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||||||
|
CMOS_STAT_A = 0x0A,
|
||||||
|
CMOS_STAT_B = 0x0B
|
||||||
|
};
|
||||||
|
|
||||||
|
// Check if CMOS is currently updating its values
|
||||||
|
static int is_updating() {
|
||||||
|
outb(CMOS_ADDR, CMOS_STAT_A);
|
||||||
|
return (inb(CMOS_DATA) & 0x80);
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint8_t get_register(int reg) {
|
||||||
|
outb(CMOS_ADDR, reg);
|
||||||
|
return inb(CMOS_DATA);
|
||||||
|
}
|
||||||
|
|
||||||
|
void cmos_read_time(cmos_time_t* time) {
|
||||||
|
// Wait for any current update to finish
|
||||||
|
while (is_updating());
|
||||||
|
|
||||||
|
uint8_t sec = get_register(CMOS_SEC);
|
||||||
|
uint8_t min = get_register(CMOS_MIN);
|
||||||
|
uint8_t hour = get_register(CMOS_HOUR);
|
||||||
|
uint8_t day = get_register(CMOS_DAY);
|
||||||
|
uint8_t month = get_register(CMOS_MONTH);
|
||||||
|
uint8_t year = get_register(CMOS_YEAR);
|
||||||
|
uint8_t statb = get_register(CMOS_STAT_B);
|
||||||
|
|
||||||
|
// If Bit 2 of Status Register B is 0, then values are BCD
|
||||||
|
if (!(statb & 0x04)) {
|
||||||
|
time->second = (sec & 0x0F) + ((sec / 16) * 10);
|
||||||
|
time->minute = (min & 0x0F) + ((min / 16) * 10);
|
||||||
|
time->hour = ((hour & 0x0F) + (((hour & 0x70) / 16) * 10)) | (hour & 0x80);
|
||||||
|
time->day = (day & 0x0F) + ((day / 16) * 10);
|
||||||
|
time->month = (month & 0x0F) + ((month / 16) * 10);
|
||||||
|
time->year = (year & 0x0F) + ((year / 16) * 10);
|
||||||
|
} else {
|
||||||
|
time->second = sec;
|
||||||
|
time->minute = min;
|
||||||
|
time->hour = hour;
|
||||||
|
time->day = day;
|
||||||
|
time->month = month;
|
||||||
|
time->year = year;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Adjust for Century (assuming we are in the 2000s for ClassicOS)
|
||||||
|
time->year += 2000;
|
||||||
|
}
|
||||||
|
|
||||||
|
void cmos_print_time(cmos_time_t* time) {
|
||||||
|
// Using your print_string/itoa style logic
|
||||||
|
char buf[16];
|
||||||
|
|
||||||
|
print_string("System Time: ");
|
||||||
|
|
||||||
|
// Simple padding check for minutes
|
||||||
|
print_hex(time->hour, 0, 1);
|
||||||
|
print_string(":");
|
||||||
|
if (time->minute < 10) print_string("0");
|
||||||
|
print_hex(time->minute, 0, 1);
|
||||||
|
print_string(":");
|
||||||
|
if (time->second < 10) print_string("0");
|
||||||
|
print_hex(time->second, 0, 1);
|
||||||
|
|
||||||
|
print_string(" ");
|
||||||
|
|
||||||
|
print_hex(time->month, 0, 1);
|
||||||
|
print_string("/");
|
||||||
|
print_hex(time->day, 0, 1);
|
||||||
|
print_string("/");
|
||||||
|
print_hex(time->year, 0, 1);
|
||||||
|
print_string("\n");
|
||||||
|
}
|
||||||
18
kernel/cmos.h
Normal file
18
kernel/cmos.h
Normal file
@@ -0,0 +1,18 @@
|
|||||||
|
#ifndef CMOS_H
|
||||||
|
#define CMOS_H
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
uint8_t second;
|
||||||
|
uint8_t minute;
|
||||||
|
uint8_t hour;
|
||||||
|
uint8_t day;
|
||||||
|
uint8_t month;
|
||||||
|
uint32_t year;
|
||||||
|
} cmos_time_t;
|
||||||
|
|
||||||
|
void cmos_read_time(cmos_time_t* time);
|
||||||
|
void cmos_print_time(cmos_time_t* time);
|
||||||
|
|
||||||
|
#endif
|
||||||
109
kernel/pci.c
Normal file
109
kernel/pci.c
Normal file
@@ -0,0 +1,109 @@
|
|||||||
|
#include "pci.h"
|
||||||
|
#include "io.h"
|
||||||
|
|
||||||
|
/* --- Configuration Access Functions --- */
|
||||||
|
|
||||||
|
uint32_t pci_config_read_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
|
||||||
|
uint32_t address = (uint32_t)((uint32_t)1 << 31) |
|
||||||
|
((uint32_t)bus << 16) |
|
||||||
|
((uint32_t)slot << 11) |
|
||||||
|
((uint32_t)func << 8) |
|
||||||
|
(offset & 0xFC);
|
||||||
|
outl(PCI_CONFIG_ADDRESS, address);
|
||||||
|
return inl(PCI_CONFIG_DATA);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pci_config_write_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t data) {
|
||||||
|
uint32_t address = (uint32_t)((uint32_t)1 << 31) |
|
||||||
|
((uint32_t)bus << 16) |
|
||||||
|
((uint32_t)slot << 11) |
|
||||||
|
((uint32_t)func << 8) |
|
||||||
|
(offset & 0xFC);
|
||||||
|
outl(PCI_CONFIG_ADDRESS, address);
|
||||||
|
outl(PCI_CONFIG_DATA, data);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* To read a word or byte, we read the Dword and shift/mask */
|
||||||
|
uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
|
||||||
|
uint32_t dword = pci_config_read_dword(bus, slot, func, offset);
|
||||||
|
return (uint16_t)((dword >> ((offset & 2) * 8)) & 0xFFFF);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
|
||||||
|
uint32_t dword = pci_config_read_dword(bus, slot, func, offset);
|
||||||
|
return (uint8_t)((dword >> ((offset & 3) * 8)) & 0xFF);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* --- BAR Decoding Logic --- */
|
||||||
|
|
||||||
|
pci_bar_t pci_get_bar(uint8_t bus, uint8_t slot, uint8_t func, uint8_t bar_index) {
|
||||||
|
pci_bar_t bar = {0};
|
||||||
|
uint8_t offset = PCI_REG_BAR0 + (bar_index * 4);
|
||||||
|
|
||||||
|
uint32_t initial_val = pci_config_read_dword(bus, slot, func, offset);
|
||||||
|
|
||||||
|
// The Size Masking Trick
|
||||||
|
pci_config_write_dword(bus, slot, func, offset, 0xFFFFFFFF);
|
||||||
|
uint32_t mask = pci_config_read_dword(bus, slot, func, offset);
|
||||||
|
pci_config_write_dword(bus, slot, func, offset, initial_val); // Restore
|
||||||
|
|
||||||
|
if (initial_val & 0x1) {
|
||||||
|
// I/O Space BAR
|
||||||
|
bar.is_io = true;
|
||||||
|
bar.base_address = initial_val & 0xFFFFFFFC;
|
||||||
|
bar.size = ~(mask & 0xFFFFFFFC) + 1;
|
||||||
|
} else {
|
||||||
|
// Memory Space BAR
|
||||||
|
bar.is_io = false;
|
||||||
|
bar.base_address = initial_val & 0xFFFFFFF0;
|
||||||
|
bar.is_prefetchable = (initial_val & 0x8) != 0;
|
||||||
|
bar.size = ~(mask & 0xFFFFFFF0) + 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
return bar;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* --- Enumeration and Discovery --- */
|
||||||
|
|
||||||
|
void pci_check_function(uint8_t bus, uint8_t slot, uint8_t func) {
|
||||||
|
uint16_t vendor_id = pci_config_read_word(bus, slot, func, PCI_REG_VENDOR_ID);
|
||||||
|
if (vendor_id == 0xFFFF) return;
|
||||||
|
|
||||||
|
uint16_t device_id = pci_config_read_word(bus, slot, func, PCI_REG_DEVICE_ID);
|
||||||
|
uint8_t class_code = pci_config_read_byte(bus, slot, func, PCI_REG_CLASS);
|
||||||
|
|
||||||
|
/* Optional: Set Master Latency Timer if it is 0.
|
||||||
|
A value of 32 (0x20) or 64 (0x40) is typical.
|
||||||
|
*/
|
||||||
|
uint8_t latency = pci_config_read_byte(bus, slot, func, PCI_REG_LATENCY_TIMER);
|
||||||
|
if (latency == 0) {
|
||||||
|
// pci_config_write_byte would be needed here, or write a dword with the byte modified
|
||||||
|
uint32_t reg_0c = pci_config_read_dword(bus, slot, func, 0x0C);
|
||||||
|
reg_0c |= (0x20 << 8); // Set latency to 32
|
||||||
|
pci_config_write_dword(bus, slot, func, 0x0C, reg_0c);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Replace with your kernel's print/logging function
|
||||||
|
// printf("Found PCI Device: %x:%x Class: %x at %d:%d:%d\n", vendor_id, device_id, class_code, bus, slot, func);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pci_init(void) {
|
||||||
|
for (uint16_t bus = 0; bus < 256; bus++) {
|
||||||
|
for (uint8_t slot = 0; slot < 32; slot++) {
|
||||||
|
// Check Function 0 first
|
||||||
|
uint16_t vendor = pci_config_read_word(bus, slot, 0, PCI_REG_VENDOR_ID);
|
||||||
|
if (vendor == 0xFFFF) continue;
|
||||||
|
|
||||||
|
pci_check_function(bus, slot, 0);
|
||||||
|
|
||||||
|
// Check if this is a multi-function device
|
||||||
|
uint8_t header_type = pci_config_read_byte(bus, slot, 0, PCI_REG_HEADER_TYPE);
|
||||||
|
if (header_type & 0x80) {
|
||||||
|
// Check functions 1-7
|
||||||
|
for (uint8_t func = 1; func < 8; func++) {
|
||||||
|
pci_check_function(bus, slot, func);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
60
kernel/pci.h
Normal file
60
kernel/pci.h
Normal file
@@ -0,0 +1,60 @@
|
|||||||
|
#ifndef PCI_H
|
||||||
|
#define PCI_H
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
/* I/O Ports for PCI Configuration Mechanism #1 */
|
||||||
|
#define PCI_CONFIG_ADDRESS 0xCF8
|
||||||
|
#define PCI_CONFIG_DATA 0xCFC
|
||||||
|
|
||||||
|
/* Common PCI Configuration Register Offsets */
|
||||||
|
#define PCI_REG_VENDOR_ID 0x00
|
||||||
|
#define PCI_REG_DEVICE_ID 0x02
|
||||||
|
#define PCI_REG_COMMAND 0x04
|
||||||
|
#define PCI_REG_STATUS 0x06
|
||||||
|
#define PCI_REG_REVISION_ID 0x08
|
||||||
|
#define PCI_REG_PROG_IF 0x09
|
||||||
|
#define PCI_REG_SUBCLASS 0x0A
|
||||||
|
#define PCI_REG_CLASS 0x0B
|
||||||
|
#define PCI_REG_CACHE_LINE_SIZE 0x0C
|
||||||
|
#define PCI_REG_LATENCY_TIMER 0x0D
|
||||||
|
#define PCI_REG_HEADER_TYPE 0x0E
|
||||||
|
#define PCI_REG_BIST 0x0F
|
||||||
|
#define PCI_REG_BAR0 0x10
|
||||||
|
#define PCI_REG_BAR1 0x14
|
||||||
|
#define PCI_REG_BAR2 0x18
|
||||||
|
#define PCI_REG_BAR3 0x1C
|
||||||
|
#define PCI_REG_BAR4 0x20
|
||||||
|
#define PCI_REG_BAR5 0x24
|
||||||
|
#define PCI_REG_INTERRUPT_LINE 0x3C
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
uint32_t base_address;
|
||||||
|
uint32_t size;
|
||||||
|
bool is_io;
|
||||||
|
bool is_prefetchable; // Only for Memory BARs
|
||||||
|
} pci_bar_t;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
uint8_t bus;
|
||||||
|
uint8_t device;
|
||||||
|
uint8_t function;
|
||||||
|
uint16_t vendor_id;
|
||||||
|
uint16_t device_id;
|
||||||
|
uint8_t class_code;
|
||||||
|
uint8_t subclass;
|
||||||
|
uint8_t interrupt_line;
|
||||||
|
} pci_dev_t;
|
||||||
|
|
||||||
|
/* Function Prototypes */
|
||||||
|
uint32_t pci_config_read_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
||||||
|
void pci_config_write_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t data);
|
||||||
|
|
||||||
|
uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
||||||
|
uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
|
||||||
|
|
||||||
|
pci_bar_t pci_get_bar(uint8_t bus, uint8_t slot, uint8_t func, uint8_t bar_index);
|
||||||
|
void pci_init(void);
|
||||||
|
|
||||||
|
#endif
|
||||||
107
kernel/ps2.c
Normal file
107
kernel/ps2.c
Normal file
@@ -0,0 +1,107 @@
|
|||||||
|
#include "ps2.h"
|
||||||
|
#include "io.h"
|
||||||
|
|
||||||
|
/* --- Controller Synchronization --- */
|
||||||
|
|
||||||
|
// Wait until the controller is ready to receive a byte
|
||||||
|
static void ps2_wait_write() {
|
||||||
|
while (inb(PS2_STATUS_REG) & PS2_STATUS_INPUT);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Wait until the controller has a byte for us to read
|
||||||
|
static void ps2_wait_read() {
|
||||||
|
while (!(inb(PS2_STATUS_REG) & PS2_STATUS_OUTPUT));
|
||||||
|
}
|
||||||
|
|
||||||
|
/* --- Initialization --- */
|
||||||
|
|
||||||
|
void ps2_write_device(uint8_t command) {
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_DATA_PORT, command);
|
||||||
|
}
|
||||||
|
|
||||||
|
void ps2_write_mouse(uint8_t data) {
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_COMMAND_REG, PS2_CMD_WRITE_MOUSE); // "Next byte goes to mouse"
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_DATA_PORT, data);
|
||||||
|
}
|
||||||
|
|
||||||
|
void ps2_init(void) {
|
||||||
|
// 1. Disable Devices
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_COMMAND_REG, PS2_CMD_DISABLE_KB);
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_COMMAND_REG, PS2_CMD_DISABLE_MS);
|
||||||
|
|
||||||
|
// 2. Flush Output Buffer
|
||||||
|
while (inb(PS2_STATUS_REG) & PS2_STATUS_OUTPUT) {
|
||||||
|
inb(PS2_DATA_PORT);
|
||||||
|
}
|
||||||
|
|
||||||
|
// 3. Set Controller Configuration Byte
|
||||||
|
// Bit 0: KB Interrupt, Bit 1: Mouse Interrupt, Bit 6: Translation
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_COMMAND_REG, PS2_CMD_READ_CONFIG);
|
||||||
|
ps2_wait_read();
|
||||||
|
uint8_t status = inb(PS2_DATA_PORT);
|
||||||
|
status |= (1 << 0) | (1 << 1); // Enable IRQ 1 and IRQ 12
|
||||||
|
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_COMMAND_REG, PS2_CMD_WRITE_CONFIG);
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_DATA_PORT, status);
|
||||||
|
|
||||||
|
// 4. Enable Devices
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_COMMAND_REG, PS2_CMD_ENABLE_KB);
|
||||||
|
ps2_wait_write();
|
||||||
|
outb(PS2_COMMAND_REG, PS2_CMD_ENABLE_MS);
|
||||||
|
|
||||||
|
// 5. Initialize Mouse (The mouse won't send IRQs until you tell it to)
|
||||||
|
ps2_write_mouse(MOUSE_CMD_SET_DEFAULTS);
|
||||||
|
ps2_wait_read(); inb(PS2_DATA_PORT); // Read ACK (0xFA)
|
||||||
|
|
||||||
|
ps2_write_mouse(MOUSE_CMD_ENABLE_SCAN);
|
||||||
|
ps2_wait_read(); inb(PS2_DATA_PORT); // Read ACK (0xFA)
|
||||||
|
}
|
||||||
|
|
||||||
|
/* --- IRQ Handlers --- */
|
||||||
|
|
||||||
|
// Called from IRQ 1 (Keyboard)
|
||||||
|
void ps2_keyboard_handler(void) {
|
||||||
|
uint8_t scancode = inb(PS2_DATA_PORT);
|
||||||
|
// Process scancode (e.g., put it into a circular buffer)
|
||||||
|
}
|
||||||
|
|
||||||
|
// Called from IRQ 12 (Mouse)
|
||||||
|
static uint8_t mouse_cycle = 0;
|
||||||
|
static uint8_t mouse_bytes[3];
|
||||||
|
|
||||||
|
void ps2_mouse_handler(void) {
|
||||||
|
uint8_t status = inb(PS2_STATUS_REG);
|
||||||
|
|
||||||
|
// Ensure this is actually mouse data
|
||||||
|
if (!(status & PS2_STATUS_MOUSE)) return;
|
||||||
|
|
||||||
|
mouse_bytes[mouse_cycle++] = inb(PS2_DATA_PORT);
|
||||||
|
|
||||||
|
if (mouse_cycle == 3) {
|
||||||
|
mouse_cycle = 0;
|
||||||
|
|
||||||
|
// Byte 0: Flags (Buttons, Signs)
|
||||||
|
// Byte 1: X Delta
|
||||||
|
// Byte 2: Y Delta
|
||||||
|
|
||||||
|
mouse_state_t state;
|
||||||
|
state.left_button = (mouse_bytes[0] & 0x01);
|
||||||
|
state.right_button = (mouse_bytes[0] & 0x02);
|
||||||
|
state.middle_button = (mouse_bytes[0] & 0x04);
|
||||||
|
|
||||||
|
// Handle negative deltas (signed 9-bit logic)
|
||||||
|
state.x_delta = (int8_t)mouse_bytes[1];
|
||||||
|
state.y_delta = (int8_t)mouse_bytes[2];
|
||||||
|
|
||||||
|
// Update your kernel's internal mouse position here
|
||||||
|
}
|
||||||
|
}
|
||||||
45
kernel/ps2.h
Normal file
45
kernel/ps2.h
Normal file
@@ -0,0 +1,45 @@
|
|||||||
|
#ifndef PS2_H
|
||||||
|
#define PS2_H
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
/* I/O Ports */
|
||||||
|
#define PS2_DATA_PORT 0x60
|
||||||
|
#define PS2_STATUS_REG 0x64
|
||||||
|
#define PS2_COMMAND_REG 0x64
|
||||||
|
|
||||||
|
/* Status Register Bits */
|
||||||
|
#define PS2_STATUS_OUTPUT 0x01 // 1 = Data ready to be read
|
||||||
|
#define PS2_STATUS_INPUT 0x02 // 1 = Controller busy, don't write yet
|
||||||
|
#define PS2_STATUS_SYS 0x04 // System flag
|
||||||
|
#define PS2_STATUS_CMD_DATA 0x08 // 0 = Data written to 0x60, 1 = Cmd to 0x64
|
||||||
|
#define PS2_STATUS_MOUSE 0x20 // 1 = Mouse data, 0 = Keyboard data
|
||||||
|
|
||||||
|
/* Controller Commands */
|
||||||
|
#define PS2_CMD_READ_CONFIG 0x20
|
||||||
|
#define PS2_CMD_WRITE_CONFIG 0x60
|
||||||
|
#define PS2_CMD_DISABLE_MS 0xA7
|
||||||
|
#define PS2_CMD_ENABLE_MS 0xA8
|
||||||
|
#define PS2_CMD_DISABLE_KB 0xAD
|
||||||
|
#define PS2_CMD_ENABLE_KB 0xAE
|
||||||
|
#define PS2_CMD_WRITE_MOUSE 0xD4
|
||||||
|
|
||||||
|
/* Mouse Commands */
|
||||||
|
#define MOUSE_CMD_SET_DEFAULTS 0xF6
|
||||||
|
#define MOUSE_CMD_ENABLE_SCAN 0xF4
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
int8_t x_delta;
|
||||||
|
int8_t y_delta;
|
||||||
|
bool left_button;
|
||||||
|
bool right_button;
|
||||||
|
bool middle_button;
|
||||||
|
} mouse_state_t;
|
||||||
|
|
||||||
|
/* Public API */
|
||||||
|
void ps2_init(void);
|
||||||
|
void ps2_keyboard_handler(void);
|
||||||
|
void ps2_mouse_handler(void);
|
||||||
|
|
||||||
|
#endif
|
||||||
@@ -4,8 +4,8 @@
|
|||||||
#include "print.h"
|
#include "print.h"
|
||||||
#include "threading.h"
|
#include "threading.h"
|
||||||
|
|
||||||
#define MAX_THREADS 16 // Maximum number of threads
|
#define MAX_THREADS 16 // Maximum number of threads
|
||||||
#define THREAD_STACK_SIZE 8192 // Stack size for each thread
|
#define THREAD_STACK_SIZE 8192 // Stack size for each thread
|
||||||
|
|
||||||
// The thread table stores information about all threads
|
// The thread table stores information about all threads
|
||||||
static Thread thread_table[MAX_THREADS];
|
static Thread thread_table[MAX_THREADS];
|
||||||
@@ -16,103 +16,106 @@ static uint32_t num_threads = 0; // Number of active threads
|
|||||||
static volatile int mutex_locked = 0;
|
static volatile int mutex_locked = 0;
|
||||||
|
|
||||||
// Function declaration for context_switch
|
// Function declaration for context_switch
|
||||||
void context_switch(Thread *next);
|
void context_switch(Thread* next);
|
||||||
|
|
||||||
// Initialize the threading system
|
// Initialize the threading system
|
||||||
void thread_init(void) {
|
void thread_init(void) {
|
||||||
memset(thread_table, 0, sizeof(thread_table));
|
memset(thread_table, 0, sizeof(thread_table));
|
||||||
num_threads = 0;
|
num_threads = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
// Create a new thread
|
// Create a new thread
|
||||||
void thread_create(Thread *thread __attribute__((unused)), void (*start_routine)(void *), void *arg) {
|
void thread_create(Thread* thread __attribute__((unused)),
|
||||||
if (num_threads >= MAX_THREADS) {
|
void (*start_routine)(void*), void* arg) {
|
||||||
my_printf("Error: Maximum thread count reached.\n");
|
if (num_threads >= MAX_THREADS) {
|
||||||
return;
|
my_printf("Error: Maximum thread count reached.\n");
|
||||||
}
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
// Find an empty slot for the new thread
|
// Find an empty slot for the new thread
|
||||||
int index = num_threads++;
|
int index = num_threads++;
|
||||||
thread_table[index] = (Thread){0};
|
thread_table[index] = (Thread){0};
|
||||||
|
|
||||||
// Set up the new thread
|
|
||||||
thread_table[index].start_routine = start_routine;
|
|
||||||
thread_table[index].arg = arg;
|
|
||||||
thread_table[index].stack_size = THREAD_STACK_SIZE;
|
|
||||||
thread_table[index].stack = (uint32_t*)malloc(THREAD_STACK_SIZE);
|
|
||||||
thread_table[index].stack_top = thread_table[index].stack + THREAD_STACK_SIZE / sizeof(uint32_t);
|
|
||||||
|
|
||||||
// Initialize the stack (simulate pushing the function's return address)
|
// Set up the new thread
|
||||||
uint32_t *stack_top = thread_table[index].stack_top;
|
thread_table[index].start_routine = start_routine;
|
||||||
*(--stack_top) = (uint32_t)start_routine; // Return address (the thread's entry point)
|
thread_table[index].arg = arg;
|
||||||
*(--stack_top) = (uint32_t)arg; // Argument to pass to the thread
|
thread_table[index].stack_size = THREAD_STACK_SIZE;
|
||||||
|
thread_table[index].stack = (uint32_t*)malloc(THREAD_STACK_SIZE);
|
||||||
|
thread_table[index].stack_top =
|
||||||
|
thread_table[index].stack + THREAD_STACK_SIZE / sizeof(uint32_t);
|
||||||
|
|
||||||
// Set the thread's state to ready
|
// Initialize the stack (simulate pushing the function's return address)
|
||||||
thread_table[index].state = THREAD_READY;
|
uint32_t* stack_top = thread_table[index].stack_top;
|
||||||
|
*(--stack_top) =
|
||||||
|
(uint32_t)start_routine; // Return address (the thread's entry point)
|
||||||
|
*(--stack_top) = (uint32_t)arg; // Argument to pass to the thread
|
||||||
|
|
||||||
// If this is the first thread, switch to it
|
// Set the thread's state to ready
|
||||||
if (index == 0) {
|
thread_table[index].state = THREAD_READY;
|
||||||
scheduler();
|
|
||||||
}
|
// If this is the first thread, switch to it
|
||||||
|
if (index == 0) {
|
||||||
|
scheduler();
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Yield the CPU to another thread
|
// Yield the CPU to another thread
|
||||||
void thread_yield(void) {
|
void thread_yield(void) {
|
||||||
// Find the next thread in a round-robin manner
|
// Find the next thread in a round-robin manner
|
||||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||||
while (next_thread != current_thread && thread_table[next_thread].state != THREAD_READY) {
|
while (next_thread != current_thread &&
|
||||||
next_thread = (next_thread + 1) % num_threads;
|
thread_table[next_thread].state != THREAD_READY) {
|
||||||
}
|
next_thread = (next_thread + 1) % num_threads;
|
||||||
|
}
|
||||||
|
|
||||||
if (next_thread != current_thread) {
|
if (next_thread != current_thread) {
|
||||||
current_thread = next_thread;
|
current_thread = next_thread;
|
||||||
scheduler();
|
scheduler();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Exit the current thread
|
// Exit the current thread
|
||||||
void thread_exit(void) {
|
void thread_exit(void) {
|
||||||
thread_table[current_thread].state = THREAD_BLOCKED; // Mark the thread as blocked (finished)
|
thread_table[current_thread].state =
|
||||||
free(thread_table[current_thread].stack); // Free the thread's stack
|
THREAD_BLOCKED; // Mark the thread as blocked (finished)
|
||||||
num_threads--; // Decrease thread count
|
free(thread_table[current_thread].stack); // Free the thread's stack
|
||||||
|
num_threads--; // Decrease thread count
|
||||||
|
|
||||||
// Yield to the next thread
|
// Yield to the next thread
|
||||||
thread_yield();
|
thread_yield();
|
||||||
}
|
}
|
||||||
|
|
||||||
// Scheduler: This function selects the next thread to run
|
// Scheduler: This function selects the next thread to run
|
||||||
void scheduler(void) {
|
void scheduler(void) {
|
||||||
// Find the next ready thread
|
// Find the next ready thread
|
||||||
uint32_t next_thread = (current_thread + 1) % num_threads;
|
uint32_t next_thread = (current_thread + 1) % num_threads;
|
||||||
while (thread_table[next_thread].state != THREAD_READY) {
|
while (thread_table[next_thread].state != THREAD_READY) {
|
||||||
next_thread = (next_thread + 1) % num_threads;
|
next_thread = (next_thread + 1) % num_threads;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (next_thread != current_thread) {
|
if (next_thread != current_thread) {
|
||||||
current_thread = next_thread;
|
current_thread = next_thread;
|
||||||
context_switch(&thread_table[current_thread]);
|
context_switch(&thread_table[current_thread]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Context switch to the next thread (assembly would go here to save/load registers)
|
// Context switch to the next thread (assembly would go here to save/load
|
||||||
void context_switch(Thread *next) {
|
// registers)
|
||||||
// For simplicity, context switching in this example would involve saving/restoring registers.
|
void context_switch(Thread* next) {
|
||||||
// In a real system, you would need to save the CPU state (registers) and restore the next thread's state.
|
// For simplicity, context switching in this example would involve
|
||||||
my_printf("Switching to thread...\n");
|
// saving/restoring registers. In a real system, you would need to save the
|
||||||
next->start_routine(next->arg); // Start running the next thread
|
// CPU state (registers) and restore the next thread's state.
|
||||||
|
my_printf("Switching to thread...\n");
|
||||||
|
next->start_routine(next->arg); // Start running the next thread
|
||||||
}
|
}
|
||||||
|
|
||||||
// Simple mutex functions (spinlock)
|
// Simple mutex functions (spinlock)
|
||||||
void mutex_init(void) {
|
void mutex_init(void) { mutex_locked = 0; }
|
||||||
mutex_locked = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
void mutex_lock(void) {
|
void mutex_lock(void) {
|
||||||
while (__sync_lock_test_and_set(&mutex_locked, 1)) {
|
while (__sync_lock_test_and_set(&mutex_locked, 1)) {
|
||||||
// Busy wait (spinlock)
|
// Busy wait (spinlock)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void mutex_unlock(void) {
|
void mutex_unlock(void) { __sync_lock_release(&mutex_locked); }
|
||||||
__sync_lock_release(&mutex_locked);
|
|
||||||
}
|
|
||||||
|
|||||||
Reference in New Issue
Block a user