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https://github.com/gbowne1/ClassicOS.git
synced 2024-11-22 06:06:52 -08:00
Moar fixes to pci.c and pci.h
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commit
168f9ebb62
@ -1,15 +1,21 @@
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cmake_minimum_required(VERSION 3.13.4)
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project(ClassicOS VERSION 0.0.1 LANGUAGES C)
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project(ClassicOS
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VERSION 0.0.1
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DESCRIPTION "An x86 Operating System for your pleasure and enjoyment"
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HOMEPAGE_URL "https://github.com/gbowne1/ClassicOS"
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LANGUAGES C ASM_NASM)
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# Source files
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set(BOOT_SOURCE_FILES
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src/boot/boot.asm
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src/boot/linker.ld
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)
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set(GRUB_SOURCE_FILES
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src/boot/grub/grub.cfg
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src/boot/grub/menu.lst
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)
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set(DRIVERS_SOURCE_FILES
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src/drivers/audio/audio.c
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src/drivers/audio/audio.h
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@ -53,7 +59,7 @@ set(KERNEL_SOURCE_FILES
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add_executable(ClassicOS
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${BOOT_SOURCE_FILES}
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${GRUB_SOURCE_FILES}
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${GRUB_SOURCE_FILES}
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${DRIVERS_SOURCE_FILES}
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${KERNEL_SOURCE_FILES}
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)
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@ -78,6 +84,7 @@ set(CMAKE_CXX_FLAGS_DEBUG "-g -O0")
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set(CMAKE_CXX_COMPILER g++)
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set(CMAKE_ASM_COMPILER nasm)
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set(CMAKE_ASM_FLAGS "${CMAKE_ASM_FLAGS} --32")
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set(CMAKE_ASM_NASM_OBJECT_FORMAT bin)
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set(CMAKE_SYSTEM_PROCESSOR i386)
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set(CMAKE_SYSTEM_NAME None)
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set(CMAKE_ASM_NASM_COMPILER nasm)
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@ -1,3 +1,5 @@
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[BITS 16]
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; Set up the segment registers
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xor ax, ax
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mov ds, ax
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@ -16,18 +16,42 @@
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// Initialize the PCI bus
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void pci_init()
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{
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// Add any necessary initialization code here
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// Enable PCI bus master
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pci_write(PCI_COMMAND_PORT, 0x04);
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}
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// Detect and configure PCI devices
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void pci_detect_devices()
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{
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// Add any necessary device detection and configuration code here
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// Scan all PCI buses and devices
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for (int bus = 0; bus < 256; bus++) {
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for (int device = 0; device < 32; device++) {
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for (int function = 0; function < 8; function++) {
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uint16_t vendor_id = pci_read(bus, device, function, 0x00);
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if (vendor_id != 0xFFFF) {
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uint16_t device_id = pci_read(bus, device, function, 0x02);
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uint8_t class_code = pci_read(bus, device, function, 0x0B);
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uint8_t subclass_code = pci_read(bus, device, function, 0x0A);
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uint8_t prog_if = pci_read(bus, device, function, 0x09);
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uint8_t header_type = pci_read(bus, device, function, 0x0E);
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uint8_t irq_line = pci_read(bus, device, function, 0x3C);
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uint32_t bar0 = pci_read(bus, device, function, 0x10);
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uint32_t bar1 = pci_read(bus, device, function, 0x14);
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uint32_t bar2 = pci_read(bus, device, function, 0x18);
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uint32_t bar3 = pci_read(bus, device, function, 0x1C);
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uint32_t bar4 = pci_read(bus, device, function, 0x20);
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uint32_t bar5 = pci_read(bus, device, function, 0x24);
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// Add any necessary device detection and configuration code here
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}
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}
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}
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}
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}
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// Read from a PCI device
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uint8_t pci_read(uint16_t port)
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uint8_t pci_read(uint8_t bus, uint8_t device, uint8_t function, uint8_t offset)
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{
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uint16_t port = PCI_BASE_ADDRESS | ((uint16_t)bus << 8) | ((uint16_t)device << 3) | ((uint16_t)function << 0x0B) | ((uint16_t)offset & 0xFC);
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uint8_t value;
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// Read from the specified port
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@ -11,8 +11,7 @@ void pci_init();
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// Detect and configure PCI devices
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void pci_detect_devices();
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// Read from a PCI device
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uint8_t pci_read(uint16_t port);
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uint8_t pci_read(uint8_t bus, uint8_t device, uint8_t function, uint8_t offset);
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// Write to a PCI device
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void pci_write(uint16_t port, uint8_t value);
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