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Moar fixes to pci.c and pci.h

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This commit is contained in:
Gregory Kenneth Bowne 2023-10-18 19:15:44 -07:00
parent 6809c6f1bf
commit 168f9ebb62
4 changed files with 41 additions and 9 deletions
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11
CMakeLists.txt
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@ -1,15 +1,21 @@
cmake_minimum_required(VERSION 3.13.4)
project(ClassicOS VERSION 0.0.1 LANGUAGES C)
project(ClassicOS
VERSION 0.0.1
DESCRIPTION "An x86 Operating System for your pleasure and enjoyment"
HOMEPAGE_URL "https://github.com/gbowne1/ClassicOS"
LANGUAGES C ASM_NASM)
# Source files
set(BOOT_SOURCE_FILES
src/boot/boot.asm
src/boot/linker.ld
)
set(GRUB_SOURCE_FILES
src/boot/grub/grub.cfg
src/boot/grub/menu.lst
)
set(DRIVERS_SOURCE_FILES
src/drivers/audio/audio.c
src/drivers/audio/audio.h
@ -53,7 +59,7 @@ set(KERNEL_SOURCE_FILES
add_executable(ClassicOS
${BOOT_SOURCE_FILES}
${GRUB_SOURCE_FILES}
${GRUB_SOURCE_FILES}
${DRIVERS_SOURCE_FILES}
${KERNEL_SOURCE_FILES}
)
@ -78,6 +84,7 @@ set(CMAKE_CXX_FLAGS_DEBUG "-g -O0")
set(CMAKE_CXX_COMPILER g++)
set(CMAKE_ASM_COMPILER nasm)
set(CMAKE_ASM_FLAGS "${CMAKE_ASM_FLAGS} --32")
set(CMAKE_ASM_NASM_OBJECT_FORMAT bin)
set(CMAKE_SYSTEM_PROCESSOR i386)
set(CMAKE_SYSTEM_NAME None)
set(CMAKE_ASM_NASM_COMPILER nasm)

4
src/boot/boot.asm
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@ -1,3 +1,5 @@
[BITS 16]
; Set up the segment registers
xor ax, ax
mov ds, ax
@ -89,7 +91,7 @@ main:
; Wait for a key press to exit the loop
mov ah, 0x00
int 0x16
; Call the detect_disk function
call detect_disk

32
src/drivers/bus/pci.c
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@ -16,18 +16,42 @@
// Initialize the PCI bus
void pci_init()
{
// Add any necessary initialization code here
// Enable PCI bus master
pci_write(PCI_COMMAND_PORT, 0x04);
}
// Detect and configure PCI devices
void pci_detect_devices()
{
// Add any necessary device detection and configuration code here
// Scan all PCI buses and devices
for (int bus = 0; bus < 256; bus++) {
for (int device = 0; device < 32; device++) {
for (int function = 0; function < 8; function++) {
uint16_t vendor_id = pci_read(bus, device, function, 0x00);
if (vendor_id != 0xFFFF) {
uint16_t device_id = pci_read(bus, device, function, 0x02);
uint8_t class_code = pci_read(bus, device, function, 0x0B);
uint8_t subclass_code = pci_read(bus, device, function, 0x0A);
uint8_t prog_if = pci_read(bus, device, function, 0x09);
uint8_t header_type = pci_read(bus, device, function, 0x0E);
uint8_t irq_line = pci_read(bus, device, function, 0x3C);
uint32_t bar0 = pci_read(bus, device, function, 0x10);
uint32_t bar1 = pci_read(bus, device, function, 0x14);
uint32_t bar2 = pci_read(bus, device, function, 0x18);
uint32_t bar3 = pci_read(bus, device, function, 0x1C);
uint32_t bar4 = pci_read(bus, device, function, 0x20);
uint32_t bar5 = pci_read(bus, device, function, 0x24);
// Add any necessary device detection and configuration code here
}
}
}
}
}
// Read from a PCI device
uint8_t pci_read(uint16_t port)
uint8_t pci_read(uint8_t bus, uint8_t device, uint8_t function, uint8_t offset)
{
uint16_t port = PCI_BASE_ADDRESS | ((uint16_t)bus << 8) | ((uint16_t)device << 3) | ((uint16_t)function << 0x0B) | ((uint16_t)offset & 0xFC);
uint8_t value;
// Read from the specified port
@ -41,4 +65,4 @@ void pci_write(uint16_t port, uint8_t value)
{
// Write the specified value to the specified port
__asm__ volatile("outb %0, %1" : : "a"(value), "dN"(port));
}
}

3
src/drivers/bus/pci.h
View File

@ -11,8 +11,7 @@ void pci_init();
// Detect and configure PCI devices
void pci_detect_devices();
// Read from a PCI device
uint8_t pci_read(uint16_t port);
uint8_t pci_read(uint8_t bus, uint8_t device, uint8_t function, uint8_t offset);
// Write to a PCI device
void pci_write(uint16_t port, uint8_t value);