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61 lines
1.8 KiB
C
61 lines
1.8 KiB
C
#ifndef PCI_H
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#define PCI_H
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#include <stdint.h>
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#include <stdbool.h>
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/* I/O Ports for PCI Configuration Mechanism #1 */
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#define PCI_CONFIG_ADDRESS 0xCF8
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#define PCI_CONFIG_DATA 0xCFC
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/* Common PCI Configuration Register Offsets */
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#define PCI_REG_VENDOR_ID 0x00
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#define PCI_REG_DEVICE_ID 0x02
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#define PCI_REG_COMMAND 0x04
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#define PCI_REG_STATUS 0x06
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#define PCI_REG_REVISION_ID 0x08
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#define PCI_REG_PROG_IF 0x09
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#define PCI_REG_SUBCLASS 0x0A
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#define PCI_REG_CLASS 0x0B
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#define PCI_REG_CACHE_LINE_SIZE 0x0C
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#define PCI_REG_LATENCY_TIMER 0x0D
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#define PCI_REG_HEADER_TYPE 0x0E
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#define PCI_REG_BIST 0x0F
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#define PCI_REG_BAR0 0x10
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#define PCI_REG_BAR1 0x14
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#define PCI_REG_BAR2 0x18
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#define PCI_REG_BAR3 0x1C
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#define PCI_REG_BAR4 0x20
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#define PCI_REG_BAR5 0x24
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#define PCI_REG_INTERRUPT_LINE 0x3C
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typedef struct {
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uint32_t base_address;
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uint32_t size;
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bool is_io;
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bool is_prefetchable; // Only for Memory BARs
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} pci_bar_t;
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typedef struct {
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uint8_t bus;
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uint8_t device;
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uint8_t function;
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uint16_t vendor_id;
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uint16_t device_id;
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uint8_t class_code;
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uint8_t subclass;
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uint8_t interrupt_line;
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} pci_dev_t;
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/* Function Prototypes */
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uint32_t pci_config_read_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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void pci_config_write_dword(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t data);
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uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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pci_bar_t pci_get_bar(uint8_t bus, uint8_t slot, uint8_t func, uint8_t bar_index);
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void pci_init(void);
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#endif
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